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NANOSYSTEMS: PHYSICS, CHEMISTRY, MATHEMATICS, 2016, 7 (3), P. 565-568
Observation of insulating and metallic-type behavior in Bi2Se3 transistor
at room temperature
V. Gunasekaran, G.H. Park, K. S. Kim, M. Suemitsu, H. Fukidome*
Research Institute of Electrical Communication, Tohoku University, 2-1-1, Katahira, Aoba-ku,
Sendai 980-8577, Japan [email protected], *[email protected]
PACS 72.20.-i DOI 10.17586/2220-8054-2016-7-3-565-568
Topological insulators are a new class of electronic materials with promising device applications. In this work, multi-layer Bi2Se3 field effect transistors (FETs) are prepared by standard lithography followed by mechanical exfoliation method. Electrical characterization of the FET has been studied at room temperature. We observed both insulating and metallic-type transport behavior when device was gate-biased. Electron-phonon scattering plays a vital role in observing this behavior. We assume that this sort of behavior could be raised from the inherent metallic surface and semiconducting interior bulk properties of Bi2Se3. Keywords: bismuth selenide, topological insulator, transistors. Received: 9 February 2016
1. Introduction
Recently, topological insulators (Bi2Se3, Bi2Te3 and Sb2Te3) have attracted much attention because of their bulk band gap (0.3 eV) and spin-polarized surface states with conductive massless Dirac Fermions [1]. Interestingly, Bi2Se3 has rhombohedral crystal structure which consists of Se or Bi lattices in stacked manner with the sequence of Se-Bi-Se-Bi-Se. This forms a sheet-like structure in which the adjacent quintuple layers (QL) are bonded by van der Waals forces [2]. According to recent reports, Bi2Se3 has been found to have potential application in field effect transistors (FET), thermoelectric materials, low-power spintronics and opto-electronics. Particularly, Bi2Se3 nanowire FET exhibits superior current-voltage characteristics with a large On/off current ratio, well saturated output current, zero cutoff current, and sharp turn-on voltage [2-5]. These unique properties open up a new consideration of Bi2Se3 as a potential candidate in spintronics and nanoelectronics.
There are few reports available on electrical transport studies of Bi2Se3 nanowire transistor [3], epitaxial growth of Bi2Se3 thin films [4], ultra-thin Bi2Se3 thin film [6], and few-layer nano-plates [7]. All these transport studies were investigated in low-temperature environment. When an ultra-thin (thickness ^3.5 nm) sample with approximately 3 QL investigated, a strong insulating state was observed. However an improved conductance was observed for the samples with thicknesses of 6.5 nm to 14 nm [3].
Yet, up to now, much less attention has paid to investigations on room-temperature transport measurement of Bi2Se3 transistors. The reason behind that, since Bi2Se3 has gapless surface states, it could show surface metallic conduction however the bulk transport conduction cannot be easily identified at room temperature. As reported by H. Zhu et al, by tuning gate electric field at different temperatures, the bulk transport conduction can be isolated from the surface metallic conduction [3]. In this work, we fabricated multi-layer (ML) Bi2Se3 transistor (back-gated) and investigated their characteristics at room temperature. We observed both insulating and metallic-type transport behavior when the device was gate-biased.
2. Experimental
2.1. Sample preparation
High quality 2D n-Bi2Se3 crystals were purchased from 2D Semiconductors Co. Mechanical exfoliation method was used to remove the Bi2Se3 layers by peeling off, followed by transferring the layers into SiO2/Si substrates (resistivity ~ 1-15 ohm cm-1). Heavily p-doped silicon with a 90 nm thick thermally grown SiO2 top layer was used as substrates. Before transferring the layers, the substrates were well cleaned ultrasonically with acetone, ethanol and DI water. ML Bi2Se3 flakes were visually identified by using an optical microscope and chosen for device fabrication. Further confirmation for the number of layers in the sample was verified using Raman spectroscopy. We measured the thickness of Bi2Se3 layer as 143 nm using Bruker (Model: Dektak XT) thickness measurement system.
2.2. Device fabrication
We used a standard photolithography processes to make an electrode pattern. Mask aligner instrument (SUSS MicroTec; Model: MJB4, GmbH, Germany) was used. The photoresist (PR) AZ 5214E was spin-coated over the sample and UV light was exposed through Cr mask. Electron-beam evaporation [Sanyu Electron Model: SVC-700, LEB/4G] method was used to make Ti/Au (10/30 nm) electrodes as source and drain and structured by lift-off using acetone. Silver contact was made to Si substrate as back-gate. Detailed lithographic processes are schematically shown in Fig. 1. The channels of these fabricated Bi2Se3 transistor are 10 ^m in length and 12 ^m in width. After fabrication, the electrical transport characteristics of the devices were analyzed with semiconductor device analyzer (Agilent Technologies, Model: B1500A). These measurements were carried out under ambient conditions.
EB Metal Evaporation
(a) (c)
Fig. 1. (a) ML Bi2Se3 is transferred on SiO2/Si substrate using mechanical exfoliation; (b) Photo-resist (PR) AZ 5214E is spincoated over the sample and UV exposure through Cr mask; (c) Evaporation of Ti/Au metals over the sample using electron beam evaporation method; (d) after lift-off process, the fabricated device with source, drain electrode pattern and back-gate (Ag electrode) configuration; (e) Optical image of fabricated FET device with Ti/Au electrodes
3. Results and discussion
Figure 2 shows the Raman spectrum of ML Bi2Se3 in the range of 100 - 250 cm-1. Raman spectroscopy is mainly used to identify and confirm the number of layers present in the sample [8,9].
We carried out Raman spectroscopy measurements using a micro-Raman spectroscopy system (model: Renishaw inVia) with a 514.5 nm laser excitation source. The power of incident laser was set as 35 mW and was focused through a 100x objective. Two characteristic peaks were observed at ~132.5 cm-1 and ~ 176 cm-1, which correspond to an in-plane mode (Eg) and an out-of-plane mode (Alg) of Rhombohedral Bi2Se3 lattice vibrations respectively [10-12]. According to Zhao et al, the Raman active out-of-plane mode (A2g) signal is strongly reduced in bulk Bi2Se3 crystal rather than strong sharp peak appeared for few layer QLs [13]. In our case of ML Bi2Se3 (thickness ~ 143 nm), a diminution in signal (Alg) was observed as appeared in Ref. 13, which further confirms sample's multi-layer nature.
The n-Bi2Se3 field effect transistor (FET) characteristic measurements were conducted on a probe station. The drain-source current (IDS) versus drain-source voltage (VDS) under different gate bias (VG) has been
Observation of insulating and metallic-type behavior in Bi2Se3.
567
Fig. 2. Raman spectra of ML Bi2Se3 flake
measured at room temperature and the results are shown in Figure 3. The applied gate voltage is changed from —5 V to 5 V in 5 V steps. The output characteristics show an insulating and metallic-type behavior when the gate biases (VG) is varied. At low gate-voltage (VG < 0), no remarkable increase in drain current was observed. While increasing gate-voltage, a significant increase in drain current was observed. A sharp increase in drain current can be seen at VG = 5 V in Fig. 3. By tuning the gate voltage, a metallic-like behavior was observed [14].
1p
^800n <
« a
400n
-«- VG= +5 V 1 1 1 1 1 1 1
J
- VG= -5 V Metallic f
- a
Insulating 9 <**» a .,,1*» 9 T ^■yjV**^__jJ
2 3 4
VDs (V)
Fig. 3. IDS-VDS under different gate bias at room temperature
According to previous reports on Bi2Se3 nano-wire FET, a metallic-like conduction was observed where mobility-temperature relationship plays a mojor role in minimizing electron-phonon scattering at low-temperature (77 K) [15,16]. However, in our case, we observed both insulating and metallic-like transport behavior under different gate bias at room-temperature. At low-gate voltage (VG < 0), the electron-phonon scattering is a dominating factor which limits the electron conduction causing insulating behavior in Bi2Se3 channel [16]. However, when gate bias is increased, the induced electron conduction dominates which suppress the electron-phonon scattering resulting metallic-like characteristics. We believe that the evolution of this metallic-type behavior at room temperature is attributed due to strong suppression of surface phonon scattering which has been achieved through gate-tuning.
Our results are further evidenced by previous observations where a strong insulating state was found in ultra-thin Bi2Se3 crystals (3 QL thickness ~ 3.5 nm). But when the thickness of film is ~ 6 - 14 nm, a weakly insulating state was observed in Bi2Se3 thin films which is attributed mainly due to strong interlayer (top and bottom) couplings [3, 17-19]. This results in the absence of scattering which shows an increased contribution for the multi-layer (> 100 nm) to the total carrier conduction. The amplitude of scattering and their related character as a function of thickness are associated with the topologically protected gapless surface states of Bi2Se3. Hence the electronic transport in ML Bi2Se3 is governed by both parallel surface and bulk contributions.
4. Conclusion
In conclusion, we have successfully fabricated ML n-Bi2Se3 FET and investigated their transistor characteristics at room temperature. Observation of both insulating and metallic transport in output characteristics further confirm that the intrinsic bulk bandgap nature and conductive surface states exist in Bi2Se3. Our findings may provide important guidance for the room-temperature transport studies on topological insulators.
Acknowledgement
This work was financially supported by the Grant-in-Aid for Scientific Research of Japan Society for the Promotion of Science (JSPS). The author (V. G.) extends sincere thanks to lab members Mr. Fuminori Sasaki, Mr. Keiichiro Tashima for their help in device fabrication and characterization.
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