CC BY
57Electronic Journal «Technical Acoustics» http://webcenter.ru/~eeaa/ejta/
2005, 4 A. Tahri1, A. Draou2
Institute of Electrotechnics, University of Science and Technology of Oran, U.S.T.O BP 1505 ElMnaouar, Oran, Algeria
Modeling of a nonlinear control method applied to an advanced static VAR compensator
Received 20.10.2004, published 07.02.2005
The paper deals with the modeling and control of an advanced static VAR (Volt Amperes Reactive) compensator (ASVC) system with self controlled DC bus which employs a three phase Pulse Width Modulation (PWM) voltage source inverter. The ASVC system is modeled using the d-q transform and employs a programmed PWM voltage wave shaping pattern stored in an EPROM to simplify the logic software and hardware requirements. The inverter system can compensate leading and lagging reactive power supplied by the load connected to the supply. This model is used to design an efficient control strategy based on the control of the phase angle of the switching pattern. Simulated results obtained with Matlab are also presented and discussed to validate the model.
INTRODUCTION
In recent years, the rapid growth of power semiconductor switching devices with high power capabilities and turn off ability has made it possible to use forced commutation converters for reactive power compensation. These devices have been successfully applied to power factor correction, improvement of voltage regulation, and increasing transient stability margin. During the last decade, there has been a great demand of controllable reactive power sources. The advantageous use of force commutated converters in reactive power compensation has been well established [1, 2]. Such compensators have also the advantages of reduced size, weight, precise control and very fast responses. This paper considers the modeling and control of one of them: STATCOM also called advanced static VAR (Volt Amperes Reactive) compensator (ASVC). This converter is a voltage source inverter which can provide or absorb reactive power depending on the network state.
The proposed static VAR compensator uses a programmed PWM voltage wave shaping switching patterns which has the advantage of less harmonic components of the reactive current and better displacement factor of the supply current [3]. It can be easily stored in an EPROM thus simplifying logic software and hardware requirements. The use of an optimized PWM voltage wave shaping patterns allows significant reduction in the filter components values and size. The operating principles of the ASVC are based on the exact equivalence of the conventional rotating synchronous compensator [4].
Computer simulation results obtained with Matlab are provided and discussed to validate the performance of the proposed model.
e-mails: 1altahri@yahoo.fr, 2adraou@yahoo.com (corresponding author)
1. MAIN OPERATING PRINCIPLES OF THE ASVC
A. Main circuit configuration
The proposed static VAR compensator which uses a programmed PWM switching pattern for the DC-to-AC converter of the voltage source type is shown in Fig. l.
Wa Ysfc 'Ac
c/c
} } Jtj . Ia Xs
Fig. 1. Power circuit of the ASVC
The major system component is a three phase PWM forced commutated voltage source inverter. The AC terminals of the inverter are connected to the AC mains through a first order low pass filter. Its function is to minimize the damping of current harmonics on utility lines. The DC side of the converter system is connected to a DC capacitor which carries the input ripple current of the inverter and is the main reactive energy storage element. The DC supply provides a constant DC voltage and the real power necessary to cover the losses of the system. The operating principles of the ASVC can be explained by considering a voltage source inverter connected to the AC mains supply through a reactor Xs, as shown in Fig. 1.
On the AC side, a reactance Xs, is inserted between the supply and the voltage source inverter, and as shown in Fig. 2, composed of Ls, which represents the leakage inductance of the transformer, and Rs, which represents the inverter and transformer losses. C is the capacitor on the DC side. Voa and Vsa are the output voltage of the converter and phase voltage of the supply, respectively.
Fig. 2. Main circuit of the ASVC
B. Operating principles
The ASVC in steady state will generate a leading reactive current when the fundamental amplitude of the output voltage Voa1 is larger than the voltage of the supply Vsa, and it will draw a lagging current from the supply when Voai is smaller than Vsa, as shown in Fig. 3.
Voal
Ial
Fig. 3. Phasor diagram for leading and lagging mode
C. Programmed PWM generation pattern
A programmed PWM switching pattern which allows the elimination of selected number of harmonics [1] is continuously applied to the six controlled switches. This method is used because it offers better voltage utilization and lower switching frequencies thus less stress on switching devices and reduction of the switching losses (increase of the efficiency of the converter).
The size of the AC side reactance filter is minimized, and the output voltage is controlled by applying previously stored switching patterns to the six controlled switches [2].
The switching angles of the programmed PWM pattern are obtained by the resolution of a set of nonlinear equations as shown in [6].
The parameters of the programmed PWM pattern used in this paper are given in Table 1 for modulation index (MI = 1.12). Fig. 4 shows the switching pattern and the corresponding line to neutral output voltage of the programmed PWM.
2. MODELING AND ANALYSIS OF THE SYSTEM
A. Nonlinear model
The voltage source of the supply given by
Va sin(® t -a)
Vs,abc Vsb = V, sin(® t - 2n/3 -a)
vsc _ sin(® t + 2n/3 - a)
(1)
where a is the phase angle which relates the phase difference between source voltage and switching function (output voltage of inverter).
Under the assumption that harmonic components generated by the switching pattern are negligible, the switching function S can be defined as follows:
~ S a " sin(® t )
S = Sb = 2/3 w sin(® t - 2n/3)
_Sc ] sin(® t + 2n/3)
(2)
The modulation index is given by
MI = \peak/vdc =№m.
(3)
Now, the output voltage of the inverter and the capacitor DC current can be expressed as follows:
idc S iabc
and
i = CdVdc
dc
dt
From Fig. 2 the relationship between the voltages and current is given by
Rs iabc + Ls dt (iabc )
with:
iabc K iqdo ,
v b = K-1 v o
s,abc s,qdo ’
Vo,abc K Vo,qdo ■
V b - V b
s,abc o,abc
Replacing equations (8) in (7), yields:
R (- iqdo )+ L. d V ) K [V.,,0 - Voqdo ] •
R, (K- iqdo ) + L, Jt (K-‘ )+„ + K-' d(iqdo ) = K[v,^ - Vo.qdo ] ■
Using matrix propriety derivation:
(K - ) = -k - d, (k )K
Substituting equation (11) in (10):
- K
_' d dt
(K)K-liqdo + K-1 d (iqdo) = K-1 [vs,qdo - vo qdo] ■
(4)
(5)
(6) (7)
(8)
(9)
(10)
(11)
(12)
After simplification:
Ls dt (qdo ) Rs iqdo + Ls ^ (K)K ^qdo + Vs,qdo Vo,qdo ’
dt
(13)
l-7, (k )k "iq* = Î(K > '* =
a
-i d
K
0
Replacing equation (14) in (13) yields:
Ld (i ) = -R i -aLid + v -v ,
s dt s q s d s , q oq ^
L d (id) = -R id + aL i + v d -v d.
s (dt s d s q s,d od
The mathematical model in d-q frame is established as follows:
(14)
(15)
d_
dt
Rs
-a
Ls
Rs
a
L
i 1 + — v — v
q sq oq
Jd _ Ls Vsd - vod _
(16)
The d-q coordinate expressions of (1), (4) and (5) by using the synchronous rotating reference frame transformation K:
Vs,qdo KVs ,abc Vs
- sin a cosa 0
(17)
Vo,qdo = KSvdc = m
dc
(18)
idc = ST K -1 jqdo = m [0 1 0
(19)
and
K = V^3
cos(at ) cos(at - 2n/ 3) cos(at + 2n/ 3) sin(a t) sin(a t - 2n/3) sin(a t + 2n/3)
1/V2 1/V2 1/V2
(20)
K-1 = KT
Xqdo = KXabc ,
(21)
(22)
where X is the voltages or the currents matrix.
q
d
q
o
Now, the complete mathematical model in the d-q frame is given by
R
-a 0
' iq " L.
d R m
1 c ^ 1 = a -
dt 0 Ls m C L0
iq - sin a
q V
id +— cosa
L
vdc _ s 0
From equation (23) the expression of the reactive current iq is given by
iq (P) =■
2 sin a p —+p
R
a
—^-sinan-------cosa
v4 L.
2
m
+---2—sin a
y L 2C
( D 2 2 ^
2 R. m
a + ~+
V
l; LCy
+ m
2R
Expression of reactive power is given by qC (p) = V q id - V d iq = -V ( id sin a + iq C°s '^ •
(23)
(24)
(25)
B. Linear model
To achieve an easier control of the system, equation (23) must be linearized under the following assumptions:
• Disturbance aA is small.
• The second-order terms are dropped.
• The quiescent operating a0 is near zero.
The trigonometric nonlinearities are treated as follows:
cos (a0 + aA) = cos a0 cos aA - sin a0 sin aA = 0, sin (a0 + aA) = cos a0 sin aA + sin a0 cos aA = aA.
The linearized model is given by
(26)
d_
dt
lqA
idA
dcA
R.
- a 0
L
a R. m
L. m -L
0 C 0
lqA
idA
dcA
+ -
V
L„
- a A 0
0
(27)
and the expression of reactive power is
qcA = iqA .
The transfer function relating q and a is given by:
(28)
ffcA (P)
Va(P )
V.2
P R m
— + p — +---2--
L. L„ L„2 C
p3 + 2 p2 R— + p
m
2 A
+ m
R
(29)
J
The proposed advanced static VAR compensator control scheme is illustrated in the block diagram of Fig. 5. The details of the control block diagram are shown in Fig. 6. This circuit consists of a PI controller and a stored switching pattern device.
Fig. 4. Line to neutral voltage and switching pattern
Fig. 5. Main circuit and control block diagram of the proposed system
Fig. 6. Details of the control block diagram
The source voltage and the ASVC's currents are transformed in the d-q axis for calculating the reactive power generated by the system which is compared to the reactive power reference, the vector Phase Locked Loop (PLL) detects the phase angle of the supply voltage which is added to the control variable a (output of the PI controller).
This sum in transient state will be given to the counter whose address will be first read in the EPROM where the inverter states switches are stored.
3. SIMULATION RESULTS
To verify the analytical key results and the validity of the proposed control scheme, the aforementioned ASVC structure was tested by computer simulation using Matlab, with the system parameters given by: Vs = 220 V, f = 50 Hz, Rs = 1 Q, Ls = 5 mH, C = 500 jF.
Based on the linear model described above and using the root locus technique the parameters of the PI controller are found to be: KP = 7.5-10-6, Kj = 2.5-10-3.
Testing of the ASVC system shown in Fig. 1 was performed for dynamic response. The amplitude of the reference was adjusted to cause the system to swing from leading to lagging mode.
Fig. 7 shows the simulated reactive power response to a reference change from 10 kVar leading to 10 kVar lagging.
Orefl Orne s fICV"arl
Fig. 7. Simulated reactive power response (step change from 10 kVar leading to 10 kVar lagging)
Performance evaluation of the subject model has also been tested for current and voltage responses to step changes. Fig. 8 shows the simulated current and voltage wave forms to a step reference changes from 10 kVar leading to 10 kVar lagging, this figure confirms that the compensator time response is fast (about 10 ms).
Vsa [V] la [A]
200 1 50 1 OO 50 O
-50 -1 OO -1 50
-200
O 0 05 0.1
Time £sec}
Fig. 8. Simulated current and voltage waveforms (step change from 10 kVar leading to 10 kVar lagging)
The harmonic spectra of current in leading and lagging mode are shown in Fig. 9 and Fig. 10. For a leading mode the total harmonic distortion is THD=3.55% instead of 1.76% in lagging mode.
Fig. 9. Harmonic spectra of current in leading mode
Fig. 10. Harmonic spectra of current in lagging mode
The DC side response to the same change is depicted in Fig. 11, which shows the simulated DC voltage across the DC capacitor. It is clear that the amplitude of the DC voltage is large when the system generates reactive power and is small when the system absorbs reactive power.
Fig. 11. Simulated inverter DC bus voltage (step change from 10 kVar leading to 10 kVar lagging)
Moreover Fig. 12 is included to show the behavior of the inverter and source voltages to this sudden change in reference.
Fig. 12. Simulated inverter line to line voltage and voltage source waveforms (step change from 10 kVar leading to 10 kVar lagging)
Fig. 12 shows the simulated inverter line to neutral voltage and voltage source waveforms to step reference changes from 10 kVar leading to 10 kVar lagging and how the inverter output voltage responds during transients.
Finally, and for completeness Fig. 13 is added to show the DC current on both leading and lagging modes.
Idc LAJ
40 I---------■----------■-------■---------1
30 ■ fl | II n | -
20 I il H II (I W il'
10 il il il il J] il -
o l/l I | f| I l/l f] l/l ,
1 ill i } l
-10 - J J J J J ,
-20 U U U --30 " * ^ " ** * -
.40 I--------.---------■--------.---------1
0.12 0.125 0.13 0.135 0.14
Time (sec)
(a) Leading mode (b) Lagging mode
Fig. 13. Simulated DC side current
4. CONCLUSION
In this paper, a high performance static VAR compensator, which employs a three phase voltage source inverter, has been presented. The proposed system has thoroughly been analyzed and a fast current controller been implemented for applications that require leading or lagging reactive power compensation. The mathematical model derived in this paper is an important contribution for future power transmission systems studies. Programmed PWM switching pattern is used as a means of reducing the size of reactive components.
The steady state and transient simulated results obtained have confirmed the applicability of the proposed scheme and have led to a proper design of a simple and fast controller for reactive power applications.
REFERENCES
[1] H. S. Patel, R. G. Hoft. Generalized Technique of Harmonic Elimination and Voltage Control in Thyristor Inverters: Part I - Harmonic Elimination. IEEE Trans. on Ind. Appl., May/June 1973, vol. IA-9, 310-317.
[2] P. N. Enjeti, P. D. Ziogas, J. F. Lindsay. Programmed PWM Techniques to Eliminate Harmonics: A Critical Evaluaton, IEEE Trans. Ind. Appl., March/April 1990, vol. 26, N°2.
[3] L. Gyugi. Compensateur statique d'énergie réactive de type avancé utilisant des thyristors à ouverture par la gâchette pour des applications à la distribution publique d'énergie électrique, Cigré 1990, 202-203.
[4] C. Shauder, H. Mehta. Vector analysis and control of advanced static VAR compensators. IEE Proccedings, July 1993, vol. 140, N°4.
[5] A. A. Mansour. Simulation of solid-state VAR compensator using VSI self-controlled DC bus. MEPCON’96, Egypt, 1996, 634-539.
[6] G. C. Cho, N. S. Choi, C. T. Rim, G. H. Cho. Modeling, analysis and control of static VAR compensator using three-level inverter. IEEE Ind. Appl. Soc. Annu. Meet., 1992, 837-843.
[7] A. Draou, Y. Sato, T. Kataoka. A new Stat feedback Based Transient Control of PWM AC to DC Voltage Type Converters. IEEE Trans. On Power Electronics, 1995, vol. 10, N°6, 716-724.
[8] A. Draou, M. Benghanem, A. Tahri, L. Kotni. A New Approch to Modelling Advanced Static Var Compensator. Conf. Rec IEEE/CESA, Hammamet, Tunisia, April 1998, vol. 3, N°7, 573-578.
Table 1. Switching angles
a a2 a3 a4 a5 a6
o 4.4 o 10.8 o 14.1 o 21.1 o 23.4 o 31.6
a7 a a9 a10 a11
o 33 o 42.3 o 43.1 o 65.9 o 66.3
LIST OF PRINCIPAL SYMBOLS
Vs,abc Instantaneous AC voltages
Vo,abc instantaneous inverter output voltages
Vs rms AC voltage
S switching function
MI Modulation Index
a phase angle between AC voltage and inverter output voltage
idc capacitor current
iq reactive current
Id real current
Rs resistance of the transformer
Ls leakage inductance of the transformer
K synchronous rotating reference frame transformation
qch instantaneous reactive power
qcA linearized instantaneous reactive power
