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80Electronic Journal «Technical Acoustics» http://webcenter.ru/~eeaa/ejta/
2005, 11
M. Kandouci1*, S. Mottet2, C. Kandouci3
1 University of SidiBel-Abbes, Algeria, 2E.N.S.S.A.T. Lannion, France, 3U.S.T.O. Oran, Algeria
A model for the conduction in polycrystalline silicon thin film transistors
Received 29.11.2004, published 29.04.2005
The aim of this paper is the analysis, prediction and optimisation of polysilicon thin film transistors (TFTs) in both « on » and « off » states. We have established a physical model which accounts for the grain, the grain surface and grain boundaries. The conduction mechanisms and the exchange between electron and hole populations are explicitly considered. Field effects are included through the influence of carrier velocity saturation, impact ionisation and interband tunnel effect. A fair agreement between experimental characteristics and simulated results is obtained, and the simulations allow a good insight into the main mechanisms controlling the TFT operation modes.
INTRODUCTION
In the active matrix liquid crystal displays, the switching of each pixel is controlled by one thin film transistor which is deposited onto the inner surface of one of the glass substrates comprising the liquid crystal cell.
This study is made in order to understand the TFT operation in both passing « on » and blocking « off » modes. At first, we describe the TFT fabrication procedure, then outline our physical model and give a brief general idea of the numerical model. The most important results about passing and blocking modes are then discussed in details. The experimental characteristics confirm the simulation results of our model, demonstrating its validity and showing its predictive capabilities.
1. THE DEVICES
The TFTs are fabricated on glass substrate as shown fig. 1. The source and drain contacts are delineated by patterning a 110 nm thick of in-situ phosphorus doped silicon layer deposited by Low Pressure Chemical Vapour Deposition (LPCVD). An undoped amorphous silicon layer is then deposited on a thickness of 80 nm by LPCVD. The layers are crystallised in a furnace at 600°C under flowing nitrogen, for 8 hours.
After crystallisation, a 150 nm-thick silicon oxide layer is deposited by Atmospheric Pressure Chemical Vapour Deposition (APCVD). A 200 nm thick aluminium layer is evaporated to form the gate of the TFT. The TFT structure is then hydrogenated by plasma microwave technique [1].
The transmission electron beam microscopy shows that the undoped polysilicon layer in the channel is made of grains having 300 nm average size and estimated orientation. The
* corresponding author, e-mail: [email protected]
doped source and drain material have a smaller polycrystalline grain size (50 nm). The undoped layer in the source and drain interface regions also exhibit a similar 50 nm grain size.
10 Mm gate
* ir
Si02(0.15^m)
4 i \ S ource n+ ^ A Drain n+
substrate
Si poly(0.05^m)
Fig. 1.
Classical polycrystalline silicon thin film transistor structure
The Id drain current versus the Vd drain voltage electrical characteristics as a function of
the Vg gate bias are given in fig. 2 for a W/L = 10 |j,m / 10 ^m structure (W and L are the
width and the length of the transistor channel). The on-state (Vg > 0) is obtained by electron
accumulation whereas the off-state (Vg < 0) corresponds to an accumulation of holes in the
channel. The conduction blocking effect is thus obtained by the drain region reverse biased induced p-n diode. When increasing the drain voltage the reverse diode leakage current increases, which penalizes the use of this type of device for flat panel display applications. A main requirement is to minimize the leakage current in the off-state. Modelling has been used to identify the conduction mechanisms and to understand the internal behaviour of the device, in order to optimise the TFT structure.
Fig. 2.
Classical experimental structure characteristics showing both on and off states. The excess of current in the off state increases rapidly with Vd
2. MODEL
2.1. General modelling approach
For the numerical simulation, a main difficulty is to describe correctly the grain geometry of the polycrystalline material. Owing to the crystalline structure of the active undoped layer and in a first approximation, it is supposed to be composed of parallelepipedic monocrystalline grains. The thickness of the grains is the thickness of the channel layer.
The grain surface has a major influence on the conduction properties of the polycrystalline film. The lattice surface defect implies silicon dangling bond and band tail densities which govern the surface charge density and the recombination-generation mechanisms.
Grain boundaries occur at the substrate and gate oxide interfaces as well as at each of the sides of the grain boundaries. The grain boundary medium is an amorphous disordered material with a large band gap. The conduction through the grain boundary medium is governed by tunnel effect.
Each grain of the polycrystal material is decomposed in three different domains to model the physical properties: (i) the monocrystalline silicon material inside the grain which is supposed to have the same energy band structure as bulk silicon, (ii) the grain surface where dangling bonds and band tails are added, and (iii) the intergrain domain which is an oxide-like material.
The grains are non-intentionally doped and the residual doping density is p-type owing to the growth technique. The dangling bond density depends on the growth technique and the hydrogenation of the layer. On the top of the channel layer the oxide layer is added together with the aluminium gate contact. The source and drain material are doped polycrystalline material together with ohmic contact boundary conditions.
2.2. Physical model
The physical model describing the steady state conduction in semiconductor material is governed by Poisson's equation
V{sVp)=-p, (1)
electron and hole balance equations:
-1 J = -U, (2)
1 J = U, (3)
H
where s is the permittivity of the material, p is the electrostatic potential, p is the charge density, Jn and J are the current densities and U is the recombination-generation.
2.3. Grain material
The grain bulk material equilibrium is governed by the surface effects. The surface charge densities tend to keep the Fermi levels near the midgap so that the carrier densities are low enough in the grains, to be expressed within Maxwell-Boltzmann statistics [2] whatever the bias conditions are:
n = NC exp
EC - EFn
KT
(4)
p = Nv exp
EV - EFp
KT
(5)
where EFn and EFp are the electrochimical potential (imref), NC, and Nv are the electron
and hole states densities, K is the Boltzmann constant and T is the temperature. The charge density is
P
= - q (n - p - dop),
(6)
where dop is the residual doping density.
The conduction within the grain is described by the drift-diffusion model. The electron and hole current densities expressions are given by [3]:
Jn = n Vn^EFn-
(7)
= p vtyEJ
Fp-
(8)
with mobility laws which take into account the saturation of the velocities under high fields
Vnsat and Vpsat [4]:
Vn,p =
Vo
Vo
1 +--------^
nsat, psat
-VEf
q
(9)
Within the grain the recombination-generation is due to deep centres described by Shockley-Hall-Read model for a level located at the midgap [2]:
TT = np- ni
SHR Tp (n + n )+Tn{p + n y
where Tp and Tn are the carrier life times.
(10)
In the blocking mode, high fields appear in the space charge region close to the drain contact. This induces electron and hole generation by impact ionisation [5]:
Gln = an \ Jn\ ■
q
Glp = ap \ Jp\
q
(11)
(12)
n, p
1
n, p
where an and a are the ionisation rates for electrons and holes, [6],
an „ -ao exp
n, p on, p ~
E,
nl, p
Fn, p
(13)
En, are the critical fields depending of the material and VEF are the fields due to the
electron (respectively hole) electrochemical potential variation components in direction of current flow. So that the total recombination-generation term is
U-USHR - Gjn- Gjp.
(14)
2.4. Grain surface and grain boundary
Band tail and ionised dangling bond densities govern the equilibrium of the grain surface. The carrier surface densities in the exponential band tails are:
EC N0C eXp
ns =\------------------1
E,
0C J
1 + exp f- E jTFn
dE,
(15)
<*a
ps = Je
N0vexp
1 + exp
dE,
(16)
v KT J
where N0C and N0V are the effective state densities in the conduction and valence band tails,
E0C and E0V are the respective energy extrema of the band tails.
The dangling bonds of the silicon atoms induce two deep energy levels Edb1 and Edb2. The
total dangling bond surfacic charge density is the summation of the two ionised states of this amphoteric defect [7]:
ns + pS1
N- = Ndb
(ns + ns1 )+{Ps + ps1 V
(17)
N + = N
db db
ns 2 + ps
ps + ns 2 )+(Ps + ps 2 Y
(18)
where Ndb is the total dangling bond density, with
ns (1,2)-ns exp
1 Ei ^-E
db(1,2) Fn
KT
(19)
Ps (1,2 )=Ps eXP
( EFp - Ed
KT
The surfacic charge density is then
Ps — q(ns - Ps + Ndb - Ndb ) •
(20)
(21)
The surfacic recombination is governed by the capture-emission process between band tails and dangling bonds:
U =N C V
u db db^db / ,
nsPs
1 - exp
KT
((s + n,)+{ps + PSr)
(22)
The conduction through the grain boundaries is described by electron and hole tunnel effects: the hole transmission probability nP through the intergrain medium depends on the hole energy E, the intergrain thickness 8 and the barrier height r.
( >
2m P
nP=exp
-2
_h_
2n,
(r ( - E )8
(23)
A similar relation holds for nP the electron transmission probability. The thermionic velocity for electron and hole, respectively is
v =
n, p
KT
v 2min,P j
(24)
So, the electron and hole current densities are expressed by
( (AE ^
Jn =- qvnn nn 1 - exp( Fn
V v KT jj
and
Jv=+ qvPn Pn
1 - exp
( AEFp
fp
V KT Jj
(25)
(26)
where AEFn and AEFp are the variations of the imref at the grain boundary; n, p are the
carrier concentrations at the surface of the grain. n^P is the transmission factor probability of the intergrain medium and vn is the thermionic emission velocity [8].
l =1
2
3. NUMERICAL SIMULATIONS
3.1. Numerical method
The numerical model is composed of equations (1) to (3). The simulation numerical
technique is based on the resolution of this set of nonlinear coupled equations, on (p, pn, pp )
with ohmic contacts at the drain and the source for boundary conditions. The source is the bias reference. The discretisation in space is made by a flux conservative box method [9] which allows to describe easily the surfacic terms. The full set of equations is solved within a coupled direct Newton method.
The mesh describes the silicon grains and the oxide. A full 2D simulation leads to a prohibitive number of nodes. In order to minimize the number of nodes the discretisation is simplified so as to have a 2D description of Poisson equation and a 1D description of the balance equations. The total equation set can then be solved within a 1D coupled method. This simplification is possible because of the small thickness of the active layer. It means that a box describes both the grain material and the interface with the oxide along the y direction. The oxide thickness is described by a single row of boxes. Along the x direction, a minimum of ten boxes is needed to describe a grain. The description of the structure leads to more than 1500 nodes in the x direction.
3.2. The model parameters
A distinction is made between the physical parameters which are linked to the physical nature of the material and the technological ones which depend on the technology.
Among the unknown parameters, we classify the adjustable ones linked to the technology such as the residual doping or the dangling bond densities. The energy levels are distributed on two discrete levels. A unique capture coefficient between band tail states and dangling bonds is considered.
All these parameters have been fixed by studying their impact on the TFT operations modes; as will be seen below, the passing mode is sensitive to the electron transmission factor nn, the dangling bonds densities Ddb and superior energy level Edb1, the blocking mode is sensitive to the dangling bond densities, the capture coefficient Cdb and the inferior energy level Edb2, and the intermediate mode between passing and blocking is sensitive to the
dangling bond densities, the two deep energy levels in the gap and the residual doping, dop. The hole transmission factor is of very small influence on the device behaviour. This transmission factor is deduced from the electron one assuming the barrier height for the holes is the same as the barrier heigth for the electrons. These parameters are summarized below.
3.2.1. The technological parameters
L(channel) = 104 nm L(grain) = 3-102 nm N(grain) = 36 T(oxide) = 1.5-102 nm
t(channel) = 50 nm dop = 5-1015 cm-3 dop = 3-1020 cm-3 i n = i p = 10-11 s
3.2.2. The physical parameters [6, 7]
E =1.12 eV s = 11.9 a = 10-14 cm2 l^n = 1400 (cm2V-1s-1) ^p = 450 (cm2V-1s-1) >k mn = 1.06 m*p = 0.59
vnsat = 1 05 (107 cm/s) vpsat = 1.2 (107 cm/s) an=7.0 (105 cm-1) ap=6.7 (105 cm-1) En= 1.231(106 V/cm) Ep = 1.693(106 V/cm) 5 = 1 nm n = 0.5
N a = 4.5 (1014 cm-2) ; Nd = 2.4 (1014 cm-2) Ea = 0.03(eV) Ed = 0.04(ev) Ddb = 1012 cm-2 Cdb = 10-7 cm3s-1 Edbl = Ec - Ea =0.27 eV Edb2=Ec - Ed = 0.68 eV
4. SIMULATION RESULTS ANALYSIS
4.1. Passing mode characteristics
4.1.1. Passing mode characteristics
The passing mode (Vg > 0) corresponds to an accumulation of electrons. The conduction is
assumed by the majority carriers and is n+nn+ bar type conduction. In this conduction type the recombination-generation mechanisms are of minor importance. The conductivity depends on the density of electrons and their velocity in the grain. The free electron density is a function of gate polarisation and fixed charge densities. These fixed charges are the sum of the ionised dopant densities, the carrier densities of the band tail states and the ionised dangling bonds.
The free carrier density represents the global equilibrium between internal charges in the grain and the surface charges in the sense of Poisson equation and depends on the gate polarisation. At the grain boundaries, the conduction is driven by the tunnel effect, which depends on free electron densities at both sides of the grain boundaries and on the transmission factor also.
The transmission factor and the density of the band tail states are the fixed parameters, which values are obtained from the literature.
At high drain polarisations, a strong field region at the drain appears, due to carrier depletion. In this region, the carriers in the grains reach their saturation velocities. The simulated drain characteristics analyse shows that the tunnel effect is a limiting effect for the conduction at low field. At high field the conduction limitation is linked to the velocity saturation in the grains. The velocity saturation mechanism cannot be neglected because of the high fields in the grains. Moreover, neglecting this mechanism would lead to continuously increased characteristics, quite different from the measured characteristics.
4.1.2. The main mechanisms describing the passing mode
The gate polarisation induces an electron accumulation in the grains and enhances the electron density in the grain boundaries giving a better conduction layer. The band diagram is shown in fig. 3, at high gate polarisation Vg = 20 V, in the absence of drain polarisation
Vd = 0 V. The drain polarisation tends to decrease the electron densities at the drain side
especially. This modifies the layer conductivity along the channel, enhancing the electric field at the drain side. This effect increases with the gate polarisation. We see it clearly in the band diagram and carrier profile densities given at Vd = 20 V and Vg = 20 V in fig. 4 and in fig. 5,
corresponding to the saturation operation mode.
Fig. 3.
Band diagram under electron accumulation, Vg = 20 V, without drain bias, Vd = 0 V
Fig. 4.
Band diagram under electron accumulation, Vg = 20 V, with a large drain bias, Vd = 20 V
corresponding to the saturation operation mode
Fig. 5.
Carrier density profiles for Vg = 20 V, with a large drain bias, Vd = 20 V, corresponding to the saturation operation mode
The velocity and impact ionisation laws vary with the fields due to the variation of the electrochemical potentials. These fields are greater than 105V/cm. At Vg = 20 V, the field is
more homogeneous than for Vg = 5V at the same drain polarisation This implies a slow current increase with the drain polarisation Vd while for Vg = 5 V, the velocity saturation is obtained quickly, leading to practically flat characteristics beyond Vd = 2 V as it is shown on the drain current characteristics versus bias drain polarisation at different gate polarisations in fig. 11. An extreme case is Vg = 0 V. Under drain polarisation the fall of the potential is
practically localised at drain contact. Consequently, the current does not vary beyond 1V. The drain polarisation lessens the electron density very efficiently. Under higher drain polarisations, Vd = 20 V, population inversion takes place near the contact. For Vd = 5 V the
current is essentially an electron current. For Vd = 20 V a hole conduction arises near the
drain. This corresponds to an intermediate operating mode between passing and blocking.
4.2. Blocking mode characteristics
4.2.1. Blocking mode characteristics
In blocking mode (Vg < 0), there is a hole accumulation in the channel and the inversion of
majority carriers type between the channel and the contact layers takes place. These two regions behave like diodes. The one at the source side forward biased, when the other at the drain side is reverse biased. At Vd = 5 V, the potential drop happens mainly in the reverse diode. When the drain polarisation increases, the effect of serial resistance is localised at the source side, as is shown on the band diagram in fig. 6 at Vg =-5V and Vd = 20 V. At
Vg = -20 V and Vd = 20 V, the material is more conductive owing to the hole density increase. Then the potential drop takes place totally in the reverse diode.
Length (|im)
Fig. 6.
Band diagram along the channel in blocking mode (hole accumulation), with a large drain bias Vd = 20 V showing both serial effect and diode voltage drop on drain side
4.2.2. The main mechanisms describing the blocking mode
In this mode, the conduction is limited by the reverse diode current. In such a case the current in the diode is the sum of the recombination-generation terms.
Under a low drain polarisation, only Shockley-Hall-Read generation mechanisms are significant. The generation takes place at the grain surfaces: this is attributable to the narrow forbidden band due to the extension of the band tail states in it, and to the high recombination density centres which constitute the dangling bonds. The recombination-generation in the grain boundaries Ulp is very important; it is estimated to be 104 greater than the
recombination-generation in the grain: Ugrajn [10].
The increase of drain polarisation acts in the same way and increases the Fermi level fields, leading to an impact ionisation generation. These fields reach their maxima at the drain contact. The detail of the electric field in the close to drain region for a large drain bias Vd = 20 V, in blocking mode, for Vg = -5 V, is proposed in fig. 7. The maximum fields
exceed 105 V/cm. A typical behaviour is the moderate current increase with drain polarisation. The current augmentation takes place, when the field increases. The high charge densities at the grain boundaries induce strong electric fields in the grains. The electron and hole impact ionisation multiplies the primary current generated by the Shockley-Hall-Read term. The impact ionisation may be limited by the serial resistance but this could not explain the experimental curve in the blocking mode. Usually, in the space charge region of the reverse junction, there are few carriers and only the generation mechanisms (USHR < 0) take place.
When the generation due to impact ionisation increases, the current increases simultaneously. The carrier velocity for Fermi field levels beyond 104 V/cm is saturated, so that the current increase corresponds to carrier densities increase. When the current increases progressively (by impact ionisation), EFn and EFp levels tend to approach each other at the midgap. When
EFn = EFp, there is no Shockley-Hall-Read generation type. Beyond this, when EFn > EFp
the recombination on the deep centres starts (UHR < 0). Quantitavely, the surface centres
dominate, hence in such conditions the surface dangling bonds allows a partial recombination of the electron-hole pairs created by impact ionisation as illustrated and detailed in fig. 8 and fig. 9 for Vg = -5 V and Vd = 20 V. The equilibrium between Shockley-Hall-Read
recombination and impact ionisation is attempted at large gate bias Vg = -20 V where the
partial compensation between the USHR recombination mechanisms and the Uion impact
ionisation generation components, for electrons and holes, is effective. This results in the current increase, due to the ionisation in the grains, and its decrease in the grain boundaries due to recombination. The generated and recombined current intensities are nearly equal [11]. Therefore the current increase due to impact ionisation is limited by the same current recombination at the grain boundaries, this prevents the breakdown of the reverse junction.
s
® 1,5
2 1,0 S 0,5
I
•g 0,0
Vg=-5 V: V d = 20 V recombination
—^impact ionisation
9,7 9,8 9,9 10,0 10,1
Length (nm)
Fig. 7.
Detail of electric field in the close to drain region for a large drain bias in blocking mode, Vg = -5 V, Vd = 20 V
Fig. 8.
The balance between the generation in the grain and the recombination at the grain boundaries in blocking mode,
Vg = -5V, Vd = 20 V
Fig. 9.
Detail of the current density in the high field drain region showing the fluctuations due to the local contributions of recombination or generation to the reverse biased p-n junction induced by the hole accumulation Vg = -5V, Vd = 20 V
The current increase with drain polarisation depends strongly on the dangling bond densities and capture coefficients. It also depends on the grain size. The generation takes place in the active layer close to the n+ drain contact. This region consists of little grains, about 50 nm. This hypothesis has been confirmed by micrography of the drain zone concerned by the generation. The Transmission Electronic Micrography (TEMj shows the drain zone fig. 10. It reveals for the non-doped polysilicon the grain sizes of 300 nm along the channel, and smaller grain sizes, in average around 50 nm, as it has been predicted by the simulation at the drain side. The grain boundaries of those little grains act like the recombination fronts of the carriers generated by impact ionisation. In the blocking mode, the model predicts a lower drain current diminution at low drain polarisation (Vd = 1V) for gate
polarisation between - 5 V and - 20 V, attributable to the space charge narrowing w. At this drain polarisation, only the Shockley-Hall-Read generation term is significant and the drain current is
W
Id—J q\USHR\dx, (27)
0
where w is the space charge region width, and USHR is the Shockley-Hall-Read
recombination-generation term.
At the high drain polarisation and at high gate polarisation in the blocking mode at Vg — -20 V, the drain current increase is very important, due to the impact ionisation and is
nearly the same as the experimentally value.
The comparison of the experimental and simulated Id (Vd) characteristics is given fig. 11.
Fig. 10.
TEM micrograph showing a detail of the drain region
Fig. 11.
The final Id (Vd ) characteristics showing
both on and off states when adding the interband tunnel effect. The excess of current increases rapidly with Vd
4.3. The interband tunnel effect
In the blocking mode, at low drain polarisation (Vd ), one difference exists between experimental and simulated curves however, fig. 11; the simulation does not account for the current increase at low drain polarisations Vd .
It is clear, that the current increase with the gate polarisation (Vg — -15 V and Vg — -20 V),
cannot be described by the impact ionisation mechanism only, hence it is necessary to take into consideration the two dimensional effects at the drain contact. This part of the device is submitted to the transverse field action which depends on the difference between gate and drain polarisations (Vg - Vd).
The drain contact consists of a n+ doped polysilicon layer, on which is deposited an undoped polysilicon layer, topped by the gate oxide and the gate contact. This part of the device is subjected to a transverse electric field action.
In blocking mode, this transverse field induces not only a high hole accumulation (p+) in the thinner layer but also a high electric field. The high carrier densities in this (n+ - p+) junction and the high electric field favour the interband tunnel effect [12] bringing a new current source into the system.
Conduction due to the interband tunnel effect should be effective only if the diode is biased with Vd ^ 0. The tunnel probability depends on the electric field (Vg - Vd), the conduction
depends on the Fermi levels imbalance and then on the drain polarisation (Vd - Vs). Globally,
this effect is equivalent to the creation of hole-electron pairs establishing the current source. It results on one current flow growing with the field intensity and then with the polarisation (V - Vd) according to the law [13]:
r (2m )2 q3EV
J tunnel —--------—2----------exp
4n2 h E1/2
g
3qEh
(28)
where E is the electric field, V is the applied potential, Eg is the forbidden band energy,
m* is the effective mass, q is the electron charge.
Presently, the problem is complex because of the predominant recombination mechanisms at the surface of the grains. We can admit that the longitudinal field is weak at the grain surface. The carriers generated by tunnel effect accumulate in the grains and most of them have a high probability to disappear before arriving into the channel. Here, once again, there exists a duality between carrier generation and their recombination on the dangling bonds. A fraction, only, of the generated carriers participate to the drain current. The unidimensional discretisation scheme does not allow to resolve this bidimensional problem. This generation mechanism is treated heuristically by including a surfacic generation term at the interface between the active layer and the n+ contact. The generation term is function of the voltage difference (Vd - Vg) and the two adjustable parameters g0 and x:
g—g0exp((Vd - Vg H (29)
with g0 = 2 1020cm"3s-1 and x = 0.36 V-1.
The same two parameters (g0, x) are used to set the generation level for all biases. The final Id (Vd) characteristics are given fig. 12. The addition of this effect in the simulation accounts for the drain current increase at low drain polarisations and at Vg —-15 V and Vg —-20 V of gate polarisations. We note that at high drain polarisations, there is a little
change because of the impact ionisation predominance.
The addition of the interband tunnel effect has allowed us to realise the correct Id (Vd) experimental fit characteristics.
Fig. 12.
Experimental and simulated Id (Vd) characteristics before adding the interband tunnel effect. We remark that for Vg < -10 V
and Vd < 10 V, the simulation does not account the accumulation increase
5. CONCLUSION
The aim of this paper was the TFT operation analysis in both passing and blocking modes. For this purpose a physical model has been established describing the polycrystalline silicon in the bulk (grains), at the grain surfaces and in the grain boundaries. The conduction mechanisms and the exchange between electron-hole populations are correctly described.
We summarize below the most important features of this study: firstly, the influence of the field effects on the saturation velocities, the impact ionisation generation, the interband tunnel effect; secondly, the grain surface description in terms of dangling bonds, band tail state densities and recombination-generation phenomena.
The analysis allows to conclude that the passing mode is equivalent to a conduction one and the blocking mode to a generation-recombination one.
Moreover this analysis leads to the equating of the impact ionisation and the interband tunnel effect by the compensating effect on the dangling bonds by recombination [14].
The simulation results have been confirmed by the experimental characteristics. This model has been successfully applied to the simulation of special TFT structures such as gate-oxide thickness increase [15, 16] or gate recess [1].
ACKNOWLEDGMENTS
The authors would like to thank N. Duhamel, B. Loisel and M. Bonnel for device fabrication and B. Guenais for TEM observations. We address a special thanks to F. Clerot for fruitful discussions and B. Abbar for reviewing.
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