The method of bandwidth extension of SiGe BiCMOS microwave variable-gain amplifier integrated circuit Текст научной статьи по специальности «Электротехника, электронная техника, информационные технологии»

Y^K 621.382

The Method of Bandwidth Extension of SiGe BiCMOS Microwave Variable-Gain Amplifier

Integrated Circuit

Savchenko E. M.\ Budiakov A. S.\ Budiakov P. S?, Prokopenko N. N."2,3

XJSC "Scientific production enterprise "Pulsar", Moscow, Russia 2Don State Technical University, Rostov-on-Don, Russia institute for Design Problems in Microelectronics of Russian Academy of Sciences, Zelenograd, Russia

E-mail: prokopniklOJO&gniaiLcom

The article proposes a method of bandwidth extension of the analog integrated circuit of the variable-gain amplifier (VGA) based on SiGe BiCMOS technology with the rules of 0.18 ^m. The designed VGA has a linear (in dB) control characteristic. The authors consider the VGA architecture and present its design outputs. They describe the properties of two modifications of the VGA integrated circuit with classical correction of the response and with the circuit of the parasitic capacitance cancellation in the high-impedance node. The article shows that the second circuit solution allows increasing the upper frequency limit of the VGA by a factor of 1.8-2.

Key words: variable-gain amplifier: "folded" cascode: operational amplifier: SiGe BiCMOS technology: R-2R matrix: cancellation: upper frequency limit

Introduction

Variable gain amplifiers (VGAs) play an important role in modern transceivers of communication systems and medical equipment. They are applied in design of various circuits with automatic gain control fl 3].

To extend bandwidth of analog integrated circuits and their functional nodes in modern microelectronics. the method of parasitic capacitance compensation [4 10] is used. which is developed in the articles fll 16].

In connection with wide application of SiGe transistors. as well as their satisfactory operation at low temperatures [17 19] and exposure to radiation [20.21]. i.e. in sensor interfaces [9]. it is of interest to investigate the possibilities of compensation circuits in analog SiGe circuits of microwave range.

The aim of the article is to disenss frequency correction features as well as comparative computer simulation results of SiGe microwave variable gain amplifier, in which the principle of parasitic capacitance cancellation is nsed in the high impedance node of one of the functional nodes the 'tairrcrit/voltage" converter based on the ''folded" cascode to increase the upper frequency limit.

1 The Schematic Structure of SiGe BiCMOS Variable Gain Amplifier

The designed VGA circuit (Fig. la) contains a broadband passive attenuator (from 0 dB to -48.16 dB) with input differential stages (R-2R network. Fig. lb) a fixed-gain amplifier (OA circuit), a gain control interface (scaler), a reference current source (sre) and also resistors of feedback R1-R7.

The scheme of VGA (Fig. la) has the following pins: VINP - VGA input; sd — reference current source (RCS) on/off (when sd is connected to grid. RCS turns on. when sd and Vcc are shorted, it turns off); GPOS. GNEG - gain factor control pins; VOUT - VGA output; FDBK - feedback pin; VCC. grid - supply voltage and global bus pins. Half of the supply voltage is fed to the GNEG and Vbias pins.

VGA operates in two modes:

• High - an increased gain mode (FDBK pin isn't connected);

• Low - a normal mode (FDBK pin is shorted to VOUT pin).

The gain control interface (''scaler" IP-modnle. Fig. la) is a voltage/current converter, the slope of which depends on the resistance of local negative feedback resistor.

Vcc Vhias VoutP

R-2R VoutN

^ mp network. Vfeed Src_pl

H - Src n

£ ¡1

(a)

frequency limit f*utoff (at the level of —3 dB) and the desired transient time t*

stab'

«P> cr Outi û-<Jis<P

Wp)

Vin(p)

In.v "," Out.i Oui. * <j_V„('p)

VM„(p)

Up)

V„ul.,<p)

(a)

(b)

Fig. 2. The flowchart of the standard amplifier output circuit (a) and the example of the compensation circuit design (b).

At the desired transient time, which must be small (t**tab ^ 0), at the given values of Coi and the upper frequency limit of the corrected amplifier f*utoff as well as at the known frequency fcutoff of the uncorrected amplifier, Cc1 capacitance of compensation circuit should be chosen from the following equations:

" 1 t* "

Cc

Cc

Coi

s a

KvgKcg ts a

Coi

(i)

KvgKcg

(1 - fcutoff IfCutoff)

where Kvg < 1 Kcg < 1 — transfer ratios of the voltage followers (VF) and the current followers (CF); tstab = RiC0i — transient time without compensation circuit.

Besides, taking into account the compensation circuit effect, the upper frequency limit f**utoff of the amplifier (Fig. 2a) is determined by the following formula:

(b)

Fig. 1. The schematic structure of VGA (a) and the general view of R-2R matrix with differential stages (b)

!'OA circuit" IP-module provides the output current signal conversion of differential stages (Fig. lb) into voltage.

2 The Method of Parasitic Capacitance Compensation in the High Impedance Node of Operational Amplifier

In the designed VGA, the principle of Coi cancellation of parasitic capacitance in the high impedance node Ei (Fig. a) is used. The idea of the bandwidth extension involves connection of some compensation circuit with the transfer function Sc(p) (Fig. b) to the high impedance node Ei [ - ]. This circuit provides compensation of the C0i effect on the low-signal characteristics of the amplifier the upper

*

f cu t o ff

1

(2)

Ri [Coi - KcgKvgCci] • Fig. 3 shows the scheme of "OA-circuit" module with the parasitic capacitance C01 compensation in the high-resistance node of the current mirror at transistors Q3-Q6.

K

R3 < R4 < R5 *

Fig. 3. The "OA_circuit" "voltage/current" converter scheme with parasitic capacitance compensation circuit.

i

i

+

C-1

ra О

5O 45 4O 35 3O 25 2O 15 1O 5 O -5 -1O

Hic Lo h me w me de

de

■ i

1,00 О,75 0,50 0,25 0,00 -0,25 -0,50 -0,75

-1,00

-O,6 -O,5 -O,4 -O,3 -O,2 -O,1 O, Vctrl

O O, , mV

1 O,2 O,3 O,4 O,5 O,6

-0,4 -0,3

-0,2 -0,1 0,0 0,1 Vctrl, mV

0,2 0,3 0,4

(a)

(b)

Рис. 4. The range of regulation of VGA in HIGH and LOW modes, when fx = 140 MHz, (a) and the dependence

of regulation accuracy on the control voltage (Vctri) (b)

According to Fig. 3 the compensation circuit includes the voltage follower based on transistor Q7, the current follower based on transistor Q4 and the capacitance Cci = 400fF. To increase the stability of the amplifier the conventional correction capacitance Cc2 = 200fF is provided.

3 The Computer Simulation

The comparative computer simulation results of two versions of the frequency correction of VGA in Cadence Virtuoso environment on SiGe Bi-CMGS models (250 rim) of transistors are given in Fig. 5.

Vctr=-0,5V

v1(1.06GHz,25,9d

Vctrl=0 v2(1.85GHz,8 ,6dB)

v1 (1.04GHz,8,6d B)

v2(2.52GHz,-7 , 99 dB)

v1( 1.06GHz ,-7,99 dBJ^V^v

.........

The accuracy of the gain control My is estimated by the formula AKy = max(AKVi), which can be presented as

20 logKyj AKy = —--+

К

Ушах

+

20 log Кутаг

К

Vmin

v„

-V*

vr„

-v„

(3)

where Kyi — gain factor at the i-th value of the control voltage Vci (i =1... 20).

Fig. 6 shows that the proposed correction circuit allows increasing its bandwidth by a factor of 1.8 — 2 in the whole range of control voltages up to f* = 1.85^2.5 GHz.

N 2.2G ■

X

? 2.0G ■ a

■Q

& 1,8G ■ n e

Я 1,6G ■

1E7 1E8 1E9 1E10

Frequency, Hz

Puc. 5. The dependence of the gain factor on the control voltage in VGA with classical correction (vl) and cancellation (v2).

They show the increase of the upper frequency limit 1.8 — 2

The regulating characteristics of VGA in the mode of low and high gain are presented in Fig. 4a.

The regulation errors are described in the diagram of Fig. 4b.

with compensation classical version

-0,5 -0,4 -0,3 -0,2 -0,1 0,0 0,1 0,2 0,3 0,4 0,5 Vctrl, mV

Puc. 6. The dependence of the upper frequency limit of VGA on the control voltage (Vctri) with the proposed (version 2) and classical (version 1) correction.

Fig. 7 shows the dependences of output power of VGA on the input power and also the output 1 dB compression point.

2,4G

0

-20

-40

1,4G

1,2G

1,0G

Tafwi. 1 The combined parameters of VGA with two versions of correction circuits

Regulation range, dB/V Upper frequency limit, GHz' Regulation accuracy, dB 1 dB compression point, dBm OIP3, dBm Current consumption, mA Supply- voltage, V

Conditions Vctrl = ±450 mV, fx = 140 MHz Vctri = 0 Vctrl = ±400 mV Vctrl = ±450 mV fx = 140 MHz, Vctrl = -0.5 V fx = 140 MHz, Vctrl = -0.5 Vcc= 5 V

VGA with classical correction 36.6 1.04 ±0.95 ±1.7 12 26 22 4.5-5.5

VGA with compensation 36.6 1.85 ±0.95 ±1.7 12 26 22 4.5-5.5

Rioad = 100 Ohm, Cload = 3 pF,T = 27 °C.

25-

20-

15-

F

CÜ T3 10-

<l) 5-

ÜL

, . 0-

Lt

O -5-

-10-

-15-

-20-

■ Out put refe ;rred 1 dB Con lpressio n = 12

■ i

-40

-35

-30

-25 -20 -15

Pin, dBm

-10

Puc. 7. The dependence of the output power on the input power for VGA of the second version, when Vcntr = -0.5 V.

Fig. 8 shows that VGA can operate at supply voltage range of 4.5 — 5.5 V and temperature range from —60 to 150 degrees (basic temperature range).

26 "1

24-

< 22-

b

20-

i=

o 18-

o

a. i 16-

V)

14-

12-

10-

5,5V

5V 4,5V

5,5V

3c

2s

O

-60

-30

30 60 temp, C

90

120

0 150

Puc. 8. The current consumption at various Vcc = 4.5 — 5.5 V.

Summary

The article shows the prospects of application of parasitic capacitance compensation circuits in high impedance nodes in SiGe analog integrated circuits.

The SiGe BiCMOS variable gain amplifier integrated circuit with linear (in dB) characteristic is designed according to the rules of 0.18 ^m, which has the following main parameters:

• regulation accuracy ±0.95 ^ 1.7 dB;

• upper frequency limit 1.85 GHz:

• tuning range 36.6 dB;

• 1 dB compression point 12 dBm;

±450

The proposed method of parasitic capacitance compensation in VGA increases its upper frequency 1.8 — 2

Taking into account high radiation hardness of SiGe transistors [20, 21] as well as their satisfactory characteristics at low temperatures [17 19], the designed VGA should be recommended for the extended application in communication devices and automatics, including those ones, which operate in the demanding environment.

Acknowledgments

The research was carried out at the expense of the Grant of the Russian Science Foundation (project No. 16-19-00122).

References

[1] Gan Jun-Ning, Zhang Wan-Rong, Mo Hong-yun and Jin Dong-yue ("2008) A High dynamic range SiGo HBT variable gain amplifier for WGDMA applications. Proceedings 2008 6th IEEE International Conference on Industrial Informatics, Danjnon, DOl: 10.1109/1ND1N.2008.4618173.

5

0

5

4

0

[2] Koh Kwang-.Iin. Youn Yong-Sik. H. Yu. ("2002) A gain boosting method at RF frequency using active feedback and its application to RF variable gain amplifier (VGA). IEEE International Symposium on Circuits and Systems, 1SCAS 2002, Vol. 3. DOl: 10.1109/1SCAS.2002.1010167.

[3] Spiridon S. and Op:t Eynde F. (2005) Low power CMOS fully differential variable-gain amplifier. Semiconductor Conference, 2005. CAS 2005 Proceedings. 2005 International.. Vol. 2. Sinaia. pp. 383-386. DOl: 10.1109/SM1-CND.2005.1558806

[4] Samadi R. and Karsilayan A.l. (2007) Uniform Design of Multi-Peak Bandwidth Enhancement Technique for Multistage Amplifiers. IEEE 'lHns. Circuits Syst. 1 tiegul. Pap., Vol. 54. No 7. pp. 1489 1499. DOl: 10.1109/tcsi.2007.899615

[5] Vadipour M. (1993) Capacitive feedback technique for wideband amplifiers. IEEE J. Solid State Circuits, Vol. 28. No 1. pp. 90 92. DOl: 10.1109/4.179208

[6] Wakimoto T. and Akazawa Y. (1990) A low-power wide-band amplifier using a new parasitic capacitance compensation technique. IEEE J. Solid-State Circuits, Vol. 25. No 1. pp. 200 206. DOl: 10.1109/4.50304

[7] Centurelli F.. Luzzi R.. Olivieri M. et al. (2002) A bootstrap technique for wideband amplifiers. IEEE Trans. Circuits Syst. 1 Fundam. Theory Appl., Vol. 49. No 10. pp. 1474-1479. DOl: 10.1109/tcsi.2002.803359

[8] Shekhar S.. Walling .1. S. and Allstot D. .1. (2006) Bandwidth Extension Techniques for CMOS Amplifiers. IEEE Journal of Solid-State Circuits, Vol. 41. No. 11. pp. 24242439. DOl: 10.1109/.ISSC.2006.883336

[9] Chang C. h. and Onabajo M. (2014) Instrumentation amplifier input capacitance cancellation for biopotential and bioimpedance measurements. 20H IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station. TX. pp. 539-542. doi: 10.1109/MWSC AS.2014.6908471

[10] Worapishet A.. Demosthenous A. and Liu X. (2010) A CMOS Instrumentation Amplifier With 90-dB CMtttt at 2-MHz Using Capacitive Neutralization: Analysis. Design Considerations, and Implementation. IEEE 'transactions on Circuits and Systems 1: Regular Papers, Vol. 58. No. 4. pp. 699-710. DOl: 10.1109/TCS1.2010.2078850

[11] Prokopenko N.N.. Budyakov P.S. and Pakhomov l.V. (2014) Circuit design of classical stages with bandwidth enhancement technique. Proceedings 6th International Conference on Computational Intelligence, Communication Systems and Networks (ClCSyNZOH). Tetovo. Macedonia Republic, pp. 202-206. doi: 10.1109/C1-CSyN .2014.50

[12] Prokopenko N.N.. Serebryakov A.l. and Budyakov P.S. (2010) Perspective high-frequency correction in differential and broadband amplifiers. Circuits and Systems for Communications (ECCSC), 2010 5th European Conference on, Belgrade. Serbia, pp. 135-139

[13] Prokopenko N.N.. Gaiduk A.R.. Budyakov P.S. and Butyrlagin N.V. (2013) The Synthesis of the Correction Circuit of the High Speed Sensors of the Physical Quantities and Current-Voltage Converters with the Parasitic Capacitance. Design & Test Symposium (EWDTS), 2014 East-West, pp. 161 164. DOl: 10.1109/ewdts.2014.7027047

[14] Prokopenko N.N.. Serebryakov A.L. Budyakov P.S. (2013) The methods of the bandwidth enhancement of the flash ADC with the differential input. The International IEEE Conference on Microwaves, Communications, Antennas

and Electronic Systems (IEEE COMCAS 2013), Israel. DOl: 10.1109/COMC AS.2013.6685296.

[15] Prokopenko N.N.. Budyakov P.S. and Butyrlagin N.V. (2013) The high-frequency correction circuit for resistive voltage dividers with capacitive load. 11th East- West Design & Test Symposium (EWDTS 2013), Rostov-on-Don. Russia, pp. 154 157.

[16] Prokopenko N.N.. Butyrlagin N.V.. Pakhomov l.V. and Gaiduk A.R. (2015) The Synthesis of Compensation Circuits of Parasitic Capacitances of the Output Circuit of Classical Broadband Amplifiers of Signal and Telecommunications Systems. 2015 International Siberian Conference on Control and Communications (SIBCON'2015), pp.1-7. DOl: 10.1109/S1BCON .2015.7147181

[17] Dvornikov O. V.. Tchekhovski V. A.. Dziatlau V. L. and Prokopenko N. N. (2016) The main characteristics of SiGe HBTs at low temperatures. Visn. NTUU KP1, Ser. tiadioteh. radioaparatobuduv., no. 66. pp. 87-96.

[18] Weinreb S.. Bardin .J.C. and Mani H. (2007) Design of Cryogenic SiGe Low-Noise Amplifiers. IEEE Trans, on Microwave Theory and Techniques, Vol. 55. No. 11. pp. 23062312. DOl: 10.1109/tmtt.2007.907729

[19] Liang Q. et al. (2006) Analysis and understanding of unique cryogenic phenomena in state-of-the-art SiGe HBlk Solid-State Electronics, Vol. 50. Iss. 6. pp. 964 972. DOl: 10.1016/j.sse.2006.04.027

[20] Florian E.T. et al. (2011) Radiation Hardness Evaluation of a 0.25 um SiGe BiCMOS Technology with LDMOS Module. Radiation and Its Effects on Components and Systems (RADECS), 2011 12th European Conference on, pp. 881-888. DOl: 10.1109/RADECS.2011.6131321.

[21] Cressler .1. D. (2006) SiGe Integrated Electronics for Extreme Environments. International Planetary ProbeWorkshop, Pasadena. CA.

Метод розширення д!апазону робочих частот БЮе Б1КМОН НВЧ мжросхе-ми регульованого шдсилювача

Савченко 6. М., Будяков О. С., Будяков П. С., Прокопенко М. М.

Запропоповапо метод розширеппя д!апазопу робочих частот апалогово! мшросхеми регульованого шдсилювача (РП) за 81Се ВЖМОН технологи з проектпими нормами 0Д8 мкм. Розроблеиий РП мае лншшу (в дБ) характеристику управлишя. Розглядаеться арх!тектура РП 1 паводяться результати його проектуваппя. Описано властивост! двох модифшацш мшросхеми РП з класи-чпою корекгцею амшнтудпо-частотпо! характеристики 1 з лапцюгом взаемпо! компепсацп паразитпо! емпост! у висомнмпедапспому вузл!. Показано, що друге схемо-техшчпе р1шеппя дозволяв збглынити верхшо грапичпу частоту РП в 1.8-2 рази.

Клюноаг слова: регульовапий шдсилювач: "перегпу-тий" каскод: операцшпий шдсилювач: 81Се ВЖМОН техполопя: матргщя 11-211: взаемпа компепсагця: верхпя гранична частота

Метод расширения диапазона рабочих частот микросхемы SiGe БиКМОП СВЧ регулируемого усилитель

Савченко Е. М., Будяков А. С., Будяков П. С., Прокопенко Н. Н.

Предлагается метод расширения диапазона рабочих частот аналоговой микросхемы регулируемого усилителя (РУ) по SiGe ВиКМОП технологии с проектными нормами 0,18 мкм. Разработанный РУ имеет линейную (в дБ) характеристику управления. Рассматривается

архитектура РУ и приводятся результаты его проектирования. Описаны свойства двух модификаций микросхемы РУ — с классической коррекцией амплитудно-частотной характеристики и с цепью взаимной компенсации паразитной емкости в высокоимпедансном узле. Показано, что второе схемотехническое решение позволяет увеличить верхнюю граничную частоту РУ в 1,8-2 раза.

Ключевые слова: регулируемый усилитель; "перегнутый" каскод; операционный усилитель; SiGe ВиКМОП технология; матрица R-2R; взаимная компенсация; верхняя граничная частота