Научная статья на тему 'Simulation of DIBL effect in 25 nm SOI-FinFET with the different body shapes'

Simulation of DIBL effect in 25 nm SOI-FinFET with the different body shapes Текст научной статьи по специальности «Медицинские технологии»

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Ключевые слова
FINFET / DIBL / POTENTIAL BARRIER

Аннотация научной статьи по медицинским технологиям, автор научной работы — Atamuratov A.E., Abdikarimov A., Khalilloev M., Atamuratova Z.A., Rahmanov R.

Short channel effects, such as DIBL are compared for SOI-FinFETs with different silicon body geometries. The original device considered was straight without narrowing at the top and a set of devices that exhibit the mentioned narrowing, up to the extreme case where the top of the gate has no surface and so the body cross-section is essentially a triangle. We have studied five different variations from the original geometry of a 25 nm gate length SOI-FinFET device with 1.5 nm thick oxide layer. The P-type channel had a doping concentration of 1015 cm-3 and n-type S/D areas are doped at concentrations of 1020 cm-3. The silicon body of the device accordingly had a height of 30 nm and a width of 12 nm. Simulation results show the source-drain barrier decreasing with increasing the upper body thickness. The DIBL effect of the considered FinFETs depends on upper body thickness, tending to increase with thicker upper body widths. Results of a comparison of two devices with different shapes but with the same cross-sectional area shows the relationship mainly depends on the shape rather than the cross-section area of the device body.

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Текст научной работы на тему «Simulation of DIBL effect in 25 nm SOI-FinFET with the different body shapes»

NANOSYSTEMS: PHYSICS, CHEMISTRY, MATHEMATICS, 2017, 8 (1), P. 71-74

Simulation of DIBL effect in 25 nm SOI-FinFET with the different body shapes

A. E. Atamuratov1, A. Abdikarimov1, M. Khalilloev1, Z. A. Atamuratova1, R. Rahmanov1, A. Garcia-Loureiro2, A. Yusupov3

1Urganch State University, Kh. Olimjan, 14, Urganch, 220100, Uzbekistan 2University of Santiago de Compostella, Ra de Jenaro de la Fuente Domnguez, 15782 - Santiago de Compostela, Spain 3Tashkent Automobile and Road Institute, 100060 Tashkent, st. A. Temur 20, Uzbekistan

atabek.atamuratov@yahoo.com, ayus@mail.ru PACS 85.30.Tv DOI 10.17586/2220-8054-2017-8-1-71-74

Short channel effects, such as DIBL are compared for SOI-FinFETs with different silicon body geometries. The original device considered was straight without narrowing at the top and a set of devices that exhibit the mentioned narrowing, up to the extreme case where the top of the gate has no surface and so the body cross-section is essentially a triangle. We have studied five different variations from the original geometry of a 25 nm gate length SOI-FinFET device with 1.5 nm thick oxide layer. The P-type channel had a doping concentration of 1015 cm-3 and n-type S/D areas are doped at concentrations of 1020 cm-3. The silicon body of the device accordingly had a height of 30 nm and a width of 12 nm. Simulation results show the source-drain barrier decreasing with increasing the upper body thickness. The DIBL effect of the considered FinFETs depends on upper body thickness, tending to increase with thicker upper body widths. Results of a comparison of two devices with different shapes but with the same cross-sectional area shows the relationship mainly depends on the shape rather than the cross-section area of the device body.

Keywords: FinFET, DIBL, potential barrier.

Received: 8 July 2016 Revised: 25 August 2016

1. Introduction

MOSFET scaling induces different effects that tend to degrade device performance. Among the most important are: technological variability of parameters [1], short channel effects (SCEs) [2], influence of single defects in oxide or oxide-semiconductor interface [3]. The use of multiple-gate topologies significantly enhances the electrostatic integrity of the device and provides increased immunity from SCEs [4]. As the devices are scaled down, new sources of variability appear, while other ones might gain more importance [5,6]. One type of variability is the narrowing of the body which might appear in a multiple-gate FinFET. Previous works on SOI-FinFET [1] have investigated the impact of the device body shape on the electric characteristics, such as threshold voltage, subthreshold swing, on-current, and off-current. In this work, we analyze the influence of body width narrowing in FinFET on short channel effects such as DIBL. The impact of the device body shape on the DIBL of a 25 nm SOI-FinFET was studied using Sentaurus TCAD simulations [7].

2. Device structure

SOI-FinFETs are currently considered one of the most promising solutions to avoid SCEs of MOSFETs, but because the body is aligned in a vertical fashion which allows self-alignedgate contacts, a body narrowing appears at the top of the gate. This will have an effect on the channel, as well as the threshold voltage, off-current, on-current and subthreshold swing [5]. We have studied five different variations from the original geometry of a 25 nm gate length SOI-FinFET device with oxide thickness 1.5 nm. The P-type channel has a doping concentration of 1015 cm-3 and n-type S/D areas are doped with concentrations 1020 cm-3. The silicon body of the device has height and width of 30 nm and 12 nm accordingly. For each device, we had simulated the device using Synopsis Sentaurus software in a local computation cluster. Our objective was to modify the original device, which is straight without narrowing at the top, with a set of devices that exhibit the mentioned narrowing, up to the extreme case where the top of the gate has no surface and so the body cross-section is triangular in shape (Fig. 1).

Fig. 1. Cross-section of SOI-FinFETs simulated, with different body top thickness, silicon body cross-section is modified from rectangle shape (a structure 1 with maximal body top thickness) up to triangle geometry (structure 6 with zero body top thickness)

3. Results of simulation and discussion

We have analyzed the influence of varying the geometry of a 25 nm gate length FinFET device to DIBL. This study has been done via drift-diffusion simulations that include quantum corrections.

For calculating DIBL, we simulated Id-Vg characteristics of FinFET devices with the geometrical parameters mentioned in Section 2. The DIBL was calculated as the change of threshold voltage per 1 V change of drain voltage. The characteristics were simulated for Vds = 0.05 V and 0.75 V. In Fig. 2, the Id-Vg characteristics, normalized to cross-section area for FinFET, with different upper body widths, are shown.

Fig. 2. The normalized transfer characteristics for FinFETs with different body top thickness at Vds = 0.75 V

The DIBL effect had a strong influence on the device geometry of FinFET and increased with increased upper body thickness (Fig. 3). This means that the threshold voltage was controlled more by the gate voltage than by the drain voltage for devices with narrower upper bodies.

Such behavior of DIBL for FinFETs with different upper body widths may be connected with changing of parasitic capacitive coupling between source (drain) and gate of the device structure; this results in a changing of potential distribution between the source and the drain for devices with different upper body widths (Fig. 4).

Simulation of DIBL effect in 25 nm SOI-FinFET with the different body shapes

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Fig. 3. SOI-FinFET DIBL dependence on body top thickness

Fig. 4. Potential distribution in the center of the body between source and drain ends of FinFETs with different body top thickness. Vds = 750 mV

In Fig. 4, the potential barrier between source and drain is shown to be lowered with increasing upper body thickness. The potential distribution and the potential barrier between the source and drain depend on the drain-source voltage (Fig. 5), which shows the DIBL effect.

In the considered FinFET devices, under conditions of constant height with decreasing upper body thickness, the cross section area also decreased. In order to verify the effect that the change in cross section area had on DIBL, the value was obtained for the initial device with rectangle top and compared to that of a device with triangle top, but with the same cross-section area (i.e. different height). The results showed that the DIBL value for the triangular device was 34 mV/V, which was less than the value obtained for the rectangular geometry device (51 mV/V). This indicate that the change in shape had more of an effect on the DIBL than the change of cross-section area of the device.

4. Conclusion

Simulation of SOI-FinFETs was performed with different upper body widths, starting with the original device, which was straight without narrowing at the top and a set of devices that exhibit the mentioned narrowing, up to the extreme case where the top of the gate had no surface and so the body cross-section was a triangle. These results showed source-drain barrier decreasing with increased upper body thickness. The DIBL effect of the considered FinFETs depended on upper body thickness, increasing with increased upper body width. Such behavior of the dependence is mainly connected with the shape rather than the cross-section area of the device's body.

1,4-

0,2-

ft, FinFET-1 (Vds=50mV) t yr FinFET-6 (Yds=50raV)

0 10 20 30 40 50 60 70 SO

Distace between source end and drain end (nm)

Fig. 5. Potential distribution in the center of body between source and drain ends of FinFETs with body top thickness 12 nm and 0 nm for Vds = 750 mV and 50 mV

References

[1] Abdikarimov A., Indalecio G., et al. Influence of device geometry on electrical characteristics of a 10.7 nm SOI-FinFET. Proceeding of the 17th International Workshop on Computational Electronics (IWCE-17), Paris, France, 3-6 June 2014, P. 247-248.

[2] Veeraraghavan S., Fossum J.G. Short-channel effects in SOIMOSFETs. IEEE Transactions on Electron Devices, 1989, 36 (3), P. 522-528.

[3] Atamuratov A.E., Aminov U.A., et al. The lateral capacitance of nanometer MNOSFET with a single charge trapped in oxide layer or at SiO2 - SI3N4 interface. Nanosystems: Physics, Chemistry, Mathematics, 2015, 6 (6), P. 837-842.

[4] Ferain I., Colinge C.A., Colinge J.-P. Multigate transistors as the future of classical metal-oxide-semiconductor field-effect transistors. Nature, 2011, 479, P. 310-316.

[5] Asenov A., Kaya S., Brown A. Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness. IEEE Transactions on Electron Devices, 2003, 50 (5), P. 1254-1260.

[6] Wang X., Brown A.R., Cheng B., Asenov A. Statistical variability and reliability in nanoscale FinFETs. Electron Devices Meeting, 2011 IEEE International, 2011, 5-7 Dec. 2011, P. 5.4.1-5.4.4.

[7] URL: http://www.synopsys.com.

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