CC BY
23
ФИЗИКО-МАТЕМАТИЧЕСКИЕ НАУКИ
«наука. инновации. технологии», № 3, 2014
Maryam J. Akbarzadeh Amir Sabbagh Molahosseini
DESIGN OF A GALOIS FIELD MULTIPLIER CIRCUIT USING QUANTUM-DOT CELLULAR AUTOMATA
Разработка схемы умножителя поля Галуа, используя клеточный автомат квантовых точек
The Quantum-dot Cellular Automata (QCA) is a possible future of nano-electronics computing technology, that promises small size, low power, and fast digital circuits compared to the existing transistor-based designs. In this paper, design of a novel Galois Field (22) multiplier using QCA is presented. This is the first QCA implementation of multiplication GF (22), which can be used as one of the components of nano-electronics cryptography circuits, such as advanced encryption standard (AES). The proposed QCA circuit is verified and simulated using QCA Designer tool.
Key words: Nano-electronics, Quantum-dot cellular automata (QCA), cryptography, Galois Field multiplication.
Клеточный автомат квантовых точек (QCA) возможно является будущим наноэлектронной вычислительной технологии, которая предполагает малые размеры, низкую потребляемую мощность и быструю производительность по сравнению с существующими устройствами на основе транзисторной технологии. В данной работе представлена разработка нового умножителя поля Галуа (22) с использованием QCA. Это первая реализация QCA умножителя поля Галуа (22), которая может быть использована в качестве одно из компонентов наноэлектронных криптографических систем, таких как улучшенный стандарт шифрования (AES). Представленный QCA контур проверен и промоделирован используя инструмент разработки QCA
Ключевые слова: наноэлектроника, клеточный автомат квантовых точек, криптография, умножение поля Галуа.
1 Introduction
Fundamental physical limitations of complementary-metal oxide semiconductor (CMOS) has been motivated researchers for studying about development and use of nanotechnology devices for future generation of integrated circuits [1]. The quantum dot cellular automata (QCA) is also one of the attractive alternatives to the CMOS. QCA is a system that use electrons and form of their position to encoding information within quantum dot cells [2]. Small circuit size and low power consumption are the most important advantages of QCA technology. On the other hand, Galois Field (GF) arithmetic GF multipliers are widely used for cryptography and coding theory, so that these are the most popular applications of GF multipliers [3].
In this paper, a novel implementation of multiplier in GF (22) is proposed. The presented multiplier designed based on bitwise XOR elements, and does not
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require lookup tables. Use of XOR gate is particularly very suitable for designing QCA complex circuits [4]. The rest of the paper is organized as follows: Section 2 and 3 reviews the basics of QCA technology and Galois Field (22) multiplication, respectively. In section 4 we describe design and layout of the proposed QCA multiplier, in details. Finally, section 5 concludes the paper.
2 Review of QCA technology
The structure of a QCA cell consists of four quantum dots that are arranged in a square as shown in Figure 1. Electrons can be situated in the quantum dots and are able to tunnel between them; so they cannot leave the cell. Every QCA cell has two possible polarization, that denoted as P = + 1 and P = -1. In fact, binary information encodes to the polarization of electrons of each QCA cell. Such that logic 0 and logic 1 are encoded in P = -1 and P = +1, respectively.
QUANTUM DOT TUNNEL JUNCTION ELECTRON
Mobile electrons
Polarization = -1
Polarization = +1
Quantum Dots
Figure 1.
QCA cell and polarizations [5].
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The binary signal propagates from input to output between two cells, in a QCA wire. There is two types of wire: 90° QCA wire and 45° QCA wire. They are illustrated in Figure 2. QCA wire crossing has two kinds: coplanar crossing and multilayer crossover. As shown in Figure 3, a multilayer crossing uses more than one layer of cells, while coplanar crossing [6], as a unique property of a QCA layout, only use of one layer for implementing the crossover. Three input majority gate is the fundamental QCA logical circuit. This gate is shown in Figure 4 and produces an output that reflects the majority of its three inputs. We use QCA majority gate to implement of AND and OR logic gates. The logic function of majority gate with assuming that A, B, and C are the three inputs is
M (A,B,C) = AB + BC + CA (1)
Figure 5, illustrates the layouts of QCA And and OR Logic gates. An inverter in QCA circuits has two different structures as shown in Figure 6.
Figure 2. (a) QCA wire (90°); Figure 3. QCA Multilayer Crossover.
(b) QCA wire (45°).
Figure 4. QCA majority gate Figure 5. QCA layout of OR, AND gate.
and the schematic.
«наука. инновации. технологии»
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Щ Out о о о о о о о о
о о о о о о о о 0 00 Out О О О О
о о о о о о о о
Figure 6. QCA inverters.
Figure 7.
The four phases of the QCA clock.
№3, 2014
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Design of a Galois Field Multiplier Circuit using Quantum-dot Cellular Automata
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QCA circuits need to be clocked to operate properly. Clocking is doing for two purposes: controlling data flow and providing power to run the circuit. Typically four-phase clocking is used in QCA circuits. As shown in Figure 7, these phases are named as Switch, Hold, Release and Relax. In the Switch phase, the tunneling barriers rise and transition of information occurs. The inter dot barrier is high in Hold phase and is low in Relax phase. When the barriers change from low to high or high to low, the cell is in the Switch or the Release phase, respectively.
3 GF (22) multiplication
GF (2) Multiplier is the same bit-wise XOR gate. Since, GF (22) is extension field of in GF (2), its multiplication will be the extension of GF (2) multiplier. So, If we assume that M = AB where A = {A1, A0}, B = {B1, B0} and M = {M1, M0} are elements of GF (22). The multiplication results of two elements in GF (22) is shown in Table 1, and also figure 8 illustrates the hardware implementation for computing multiplication in GF (), and also its formulas are as follows [7]:
Mi = A1B1 © Ao Bo © Ai Bo
M0 = A1B1 © A0 B0
(2) (3)
Figure 8.
Hardware implementation of multiplication in GF (2) [8].
Table 1. PRE-COMPUTED GF (22) MULTIPLICATION RESULTS
0 1 2 3
0 0 0 0 0
1 0 1 2 3
2 0 2 3 1
3 0 3 1 2
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4 QCA GF(22) Multiplier Implementation
In this section, we describe our novel QCA design of GF (22) multiplier. We use a type of QCA XOR gate that does not have any crossover wire. To design large and complex QCA circuits, it is better to use components without any type of crossovers. Figure 9 illustrates the layout design of the XOR gate used in our multiplier design [4]. Considering the circuit of GF (22) multiplier that is shown in Figure 8 and results of Table 1, the QCA design of our multiplier is designed and depicted in Figure 10. We used crossovers and three layers with total latency of 3 clocks. Besides, the multiplier design simulated using QCA Designer software version 2.0.3, and simulation results have shown in Figure 11.
-1.00
Figure 9. QCA layout of used XOR gate [4].
5 Conclusion
Galois field (2m), an extension field of GF (2), plays an important role in many applications such as error detecting and cryptography systems, since each byte of data can be represent as a vector in a finite field, and then encryption and decryption using mathematical operations can be done very straightforward and fast. In this paper, we have proposed an efficient structure of Quantum-dot Cellular Automata based multiplier in GF (22) that can be used easily, as a component of a complex cryptography circuit.
Figure 11.
Simulation results of the proposed QCA multiplier.
«наука. инновации. технологии»
.Северо-Кавказский федеральный университет
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OB ABTOPAX
Amir Sabbagh Molahosseini, Faculty Member of Department of Computer Engineering Kerman Branch, Islamic Azad University, Kerman, Iran. ASSISTANT PROFESSOR, PH.D. Phone: 00989131403688, E-mail: Sabbagh.iauk@gmail.com.
Maryam Jahantigh Akbarzadeh, MS, Faculty of Electrical and Computer Engineering, Graduate University of Advanced Technology, Kerman, Iran. Phone: +989371794515, E-mail: m.jahantighakbarzadeh@student.kgut.ac.ir.
