Научная статья на тему 'On the Problem of Selection of Modified Code with Summation of On-Bits for Logical Devices Test'

On the Problem of Selection of Modified Code with Summation of On-Bits for Logical Devices Test Текст научной статьи по специальности «Медицинские технологии»

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Ключевые слова
concurrent error detection system / code with summation / Berger code / modifiedBerger code / benchmarks / structural redundancy

Аннотация научной статьи по медицинским технологиям, автор научной работы — Dmitry Efanov, Valery Sapozhnikov, Vladimir Sapozhnikov, Anton Bliudov

Characteristics of modified codes with summation of on-bits (modified Berger codes) are analyzed during the experiment with the set of benchmarks. It is shown that the way of calculation of correction factor of modified Berger code has the fundamental importance and determines different properties of diagnostic system (both complexity of technical implementation and error detection on the outputs of checked device). Authors have developed the algorithm of selection of modified Berger code for diagnostic system formation that allows maximizing the error detection factor and minimizing the diagnostic system technical realization complexity factor.

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Похожие темы научных работ по медицинским технологиям , автор научной работы — Dmitry Efanov, Valery Sapozhnikov, Vladimir Sapozhnikov, Anton Bliudov

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Текст научной работы на тему «On the Problem of Selection of Modified Code with Summation of On-Bits for Logical Devices Test»

On the Problem of Selection of Modified Code with Summation of On-Bits for Logical Devices Test

Dmitry Efanov, Valery Sapozhnikov, Vladimir Sapozhnikov, Anton Bliudov

Abstract—Characteristics of modified codes with summation of on-bits (modified Berger codes) are analyzed during the experiment with the set of benchmarks. It is shown that the way of calculation of correction factor of modified Berger code has the fundamental importance and determines different properties of diagnostic system (both complexity of technical implementation and error detection on the outputs of checked device). Authors have developed the algorithm of selection of modified Berger code for diagnostic system formation that allows maximizing the error detection factor and minimizing the diagnostic system technical realization complexity factor.

Keywords—concurrent error detection system; code with summation; Berger code; modifiedBerger code; benchmarks; structural redundancy.

I. Introduction

Different methods of check circuits synthesis areused for the formation of reliable control systems on microelectronic and microprocessor component base[1 - 8]. In such circuits an emerging fault of the given class (the most often is the class of stuck-at faults [9]) appears on the outputs in the form of protective combination at least on one input combination [10] as they should be designed in self-checking way.

Classic codes with summation (Berger codes) [11] are often used for self-checking circuits synthesis as well as their modifications [12 - 15]. It is shown in [16] that code's characteristics of detection of errors in data bits determine properties of error detection on the outputs of tested object. In case of impossibility of detection of 100% of the given class faults methods of selection of groups of testable outputs [17] and of diagnostic object structure modification [18] are applied. Structural redundancy added to the diagnostic object or to the

Manuscript received November 18, 2016.

Dmitry Efanovis with the "Automation and Remote Control on Railways" department,Emperor Alexander I St. Petersburg State Transport University, Russian Federation(corresponding author e-mail: tres-4b@yandex.ru).

Valery Sapozhnikovis with the the" Automation and Remote Control on Railways" department,Emperor Alexander I St. Petersburg State Transport University, Russian Federation.

Vladimir Sapozhnikovis with the the"Automation and Remote Control on Railways" department,Emperor Alexander I St. Petersburg State Transport University, Russian Federation.

Anton Bliudovis with the the" Automation and Remote Control on Railways" department,Emperor Alexander I St. Petersburg State Transport University, Russian Federation.

check circuit depends on the rules of formation of check vector bits of code with summation [19].

The modified code with summation of on-bits, also known as RS(m,k)-code (where m and k = |~log2 (m +1)] - lengths of data and check vectors respectively) seems to be perspective for the task of check circuits organization [20].

First the way of RS(m,k)-code formation was offered in [15]. It is based on the calculation of modified weight of data vector using the following formula:

W = r(mod M ) + oM, (1)

where r - weight of data vector (number of on-bits);

M = 21

2 (»+1)1-1

- modulo of weight calculation; expres-

sionr(modM) determines the smallest nonnegative residue of the value of weight by modulo M; a - special correction factor -XOR sum of previously chosen data vector bits.

First papers in the field of RS(m,k)-codes research concerned the analysis of characteristics of error detection in data vector with the only way of correction factor calculation: a = fk+1 © fk+2 ©... © fm-1 © fm , where f (i e {1;2;...;m}) -data vector bit[15, 21, 22].

It is offered in [23] to formmodulo modified codes with summation, also known as RSM(m,k)-codes, that assume calculation of summary weight using formula (1) but with modulo value chosen from variety M e {2;4;...;2rlogl(m+1)]-2}.

Correction factor could be calculated as XOR sum of any bits of data vector, and total number of code formation ways is

equal to

m-1

= 2 m - 2

-2 [20, 24].In [25] describes the family of

modulo modified codes with summation of on-bits with different methods of correction factor calculation.

It is stated in [20] that it does not matter which bits exactly are used for correction factor calculation in general case that considers all data vectors; only number of such bits acts. RS(m,k)-codes have the same characteristics of error detection in data vectors in case of the same number of bits in correction factor calculation formula. Minimum number of undetectable errors as well as the minimum number of twofold undetectable

m

errors has the RS(m,k)-code, that uses — data bits for a calcu-

m ± 1

lation (in case of even m) and--ifm is odd.

2

The key properties of RS(m,k)-codes should be stated; it is expediently to consider them during check system organization [26]:

1. RS(m,k)-codesdetect all errors with odd multiplicity.

2. RS(m,k)-codes does not detect about one half of possible symmetric errors in data vectors, also having some symmetric errors with even multiplicity undetectable.

3. RS(m,k)-codesdetect any monotonous errors except for some with multiplicity d=M.

4. RS(m,k)-codes detect asymmetric errors with any multiplicities d<Mand does not detect some with multiplici-

ties d = M + 2j, j = 1,2,...,q, q <

m - M 2

All possible data vectors are rarely formed on the outputs of real circuits; this is explained by their functioning conditions (input combinations set) and their topology. So the rules of correction factor calculation are significant and have an influence on every particular case. Authors have posed the following problem: analyze the influence of correction factor calculation rules on the properties of error detection on benchmark outputs and on structural redundancy of diagnostic systems based on RS(m,k)-codes.

II. Structural scheme of diagnostic system

Structural scheme of a diagnostic system of logical device F(x) realizing the set of Boolean functions fi, f2, ...fm is shown on Fig. 1.

Check circuit

Fig. 1. Diagnostic system structural scheme

For the possibility of fault detection during operation it is added with on-line diagnostic system, which consists of check logic block, that calculates the set of check functions g1, g2, ..., gk, and checker TSC, comparing functions fi, /2, ..., fm and gi, g2, ..., gk [27, 28]. The simplest way of TSC implementation (for identifying if code words belong to the chosen code) is a cascade connection of check bits generators Gf) [29] and comparator TRC. Gf) calculates alternative check functions g'i, g'2, ..., g'k on the base of primary system functions; TRC compares signals of the same name gjand g'j (j e {l;2;...;k}) and forms the single check signal <zV> [30]. In case of correct operation of all system blocks a two-rail signal <01> or

<10> is formed; presence of in-phase signal <00> or <11> shows that a fault occurred in one of diagnostic system parts.

Comparator circuit of checker is standard; it is formed as compression scheme of two-rail signals. k-1 standard modules of two-rail signals compression (so-called two-rail checker, TRC, shown on Fig. 2 are needed for comparator circuit formation. Structure of other blocks of diagnostic system depends on the type of code it is based on. Gf) is the coder of this code, that calculates check vector bits based on the values of operative outputs; G(x) also forms check vector, but on the base of diagnostic system inputs.

Fig. 2. Two-rail checker

III. INSTRUMENTAL BASE FOR EXPERIMENTS

The special software that allows to form descriptions of G(x) and G(f) blocks for the given circuit in *.pla format [31] was developed during experimental researches of characteristics of modified codes with summation. Then files were analyzed using SIS interpreter and complexity of their technical realization was determined; it was measured in standard conventional units of area occupied by the device on the chip with the use of stdcell2_2.genlib library of standard gates. Area of diagnostic system could be determined using the following formula:

lced = lf ( x) + lg(x ) + lo (f) + 16k + 192(k -1), (2)

where values L

F (x ),

LG(x) and Lg(f ) characterize areas of

respective blocks of diagnostic system, value 16k corresponds to the area occupied by inverter cascade, 192(k -1) - area of TRC comparator in stdcell2_2.genlib library.

Some benchmarks from LGSyntK89 [32] base were analyzed. Circuits from this set are stored in *.netblif format which contains data about the circuit structure. This allowed analyzing of an influence of single stuck-at faults of inner gates on the outputs of the circuit and possible coding methods. All possible single stuck-at faults of inner gates were consistently set in the structure of circuit during the experiment; then all possible input combinations were set on its inputs. This allowed forming the varieties of data vectors containing an error (detectable or undetectable) and not containing. Then the total number of vectors containing an unde-

0

z

z

x

tectable error was determined. As a result a statistics was obtained for every circuit; it contained all undetectable errors with their multiplicities d e {1;2;...;m} and type (single, monotonous, symmetric, asymmetric [33]).

IV. Results of experiments for the analysis of

CHARACTERISTICS OF ERROR DETECTION

The influence of single stuck-at faults of inner gates' outputs on the outputs of benchmarks was determined during the experiment for the analysis of characteristics of error detection using RS(m,k)-codes. Stuck-at faults of inner gates were set in the structure consistently; then all possible input combinations were set. The way of correction factor a calculation for the RS(m,k)-code corresponding to the given number of circuit outputs, and distributions of undetectable errors by type and multiplicity were formed.

Analyze the experiment results on the illustrative example of check of combinational circuit «cm 162a» having 14 inputs and 5 outputs. Experiment has shown that 314067 monotonous, 1920 symmetric and 1344 asymmetric errors (total 317331) are formed on its outputs. Table 1 contains data about error detection characteristics of RS(m,k)-codes with different ways of correction factor calculation.

TABLE I.

Error detection indexes of RS(m,k)-codes applied to «cm162a» circuit

№ a Undetectable errors Error detection indexes

Uni-di-rec-tion-al, d=4 Sym-metrical, d=2 Total U 4, % 02, % Y m, %

1 0, 31 6493 1920 8413 100 100 2.65117

2 1, 30 5597 1920 7517 86.201 100 2.36882

3 2, 29 224 1920 2144 3.45 100 0.67564

4 3, 28 672 1920 2592 10.35 100 0.81681

5 4, 27 224 1536 1760 3.45 80 0.55463

6 5, 26 672 1536 2208 10.35 80 0.6958

7 6, 7 6045 1536 7581 93.1 80 2.38899

8 8, 23 224 0 224 3.45 0 0.07059

9 9, 22 672 0 672 10.35 0 0.21177

10 10, 11 6045 0 6045 93.1 0 1.90495

11 12, 13 6045 384 6429 93.1 20 2.02596

12 14, 17 672 384 1056 10.35 20 0.33278

13 15, 16 224 384 608 3.45 20 0.1916

14 18, 19 6045 384 6429 93.1 20 2.02596

15 20, 21 6045 0 6045 93.1 0 1.90495

16 24, 25 6045 1536 7581 93.1 80 2.38899

Classic Berger codes does not detect all symmetric errors. For example it is 1920 errors for «cm162a» circuit (0.6% of all errors arising). Some RS(m,k)-codes detect part of symmetric errors on the outputs of real combinational circuits. It should be noted that RS(m,k)-code with data vector length m=5 (equal to the number of example circuit outputs) has only monotonous errors with multiplicity d=4 undetectable i.e. detects all asymmetric errors [26]. That is why some ways of correction factor calculation may cause worsening of RS(m,k)-code error detection properties comparing to the Berger code.

Nevertheless such way of RS(m,k)-code formation could be selected for any circuit that allows to detect more errors on its outputs than Berger code.

For the simplification of notations special designations for RS(m,k)-codes correction factor calculation formulas are introduced in Table 1. Formulas are designated with decimal equivalents of binary values that define positions of bits used in correction factor calculation process. On-bits in this binary values correspond to the used bits. For example, decimal value 27 correspond to binary value <11011>; that means that a = fi © f2 © f4 © f5. So the decimal value presented in table 1 uniquely determines one code from RS(m,k)-codes with given data vector length.

Despite the fact that use of RS(m,k)-codes does not ensure detection of 100% errors, change of correction factor calculation formula may minimize the number of undetectable errors and decrease the probability of their appearance for the given circuit by that. The following error detection indexes are determined in table 1:

- Ud - ratio of multiplicity d unidirectional undetectable errors to the total number of given multiplicity monotonous errors in given circuit;

- cd - ratio of multiplicity d symmetrical undetectable errors to the total number of given multiplicity symmetric errors;

- y m - ratio of undetectable by the given code errors to the total number of possible errors of the outputs of the circuit.

Index ym allows to analyze the effectiveness of error detection by RS(m,k)-codes with different way of correction factor calculation for any circuit (Fig. 3). Values of this index for «cm 162a» circuit is from 2.65117% to 0.07059% for different ways of a calculation (Fig. 3).

Fig. 3. Value of ym index for the benchmark «cm162a»

As an experiment has shown, this index is much less for other circuits: for example for the circuit «alu2» minimum value of y m is 0.01645%, and maximum - 0.12441%; for the circuit «x2» minimum is 0%, maximum - 0.73067%.

Let's mark some regularities that determine ways of formation of RS(m,k)-codes with different error detection properties:

1) unlike in theoretical results in [20, 24 - 26], experiments have shown that for every benchmark the choice of specific bits of data vector matters and allows to decrease the number of undetectable errors even with the same number of them in correction factor calculation formula;

2) same distributions of undetectable errors on types and multiplicities are always obtained for the pairs of decimal equivalents of correction factor calculation and there is no case when the same distribution is obtained for odd types of correction factor calculation ways.

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Item 1 could be illustrated with the following example. In table 1 the option with correction factor calculation using decimal equivalent 1 gives more undetectable errors than an option with decimal equivalent 8. In the first case a = fx, in the second a = f4. So the separate check of the fourth bit allows reducing the number of undetectable errors significantly.

The feature stated in the item 2 allows selecting from chosen ways of code formation the one that will improve system characteristics by one more criterion, for example, by technical implementation complexity.

V. Results of experiments with benchmarks structural

REDUNDANCY

Complexity of concurrent error detection system technical realization is evaluated by the area occupied by the device on chip (see formula 2). Authors have obtained description files of all diagnostic system components (Fig. 1) using the specially developed software complex. Then using the widely known interpreter SIS and standard gates library stdcell2_2.genlib [31] authors have got areas of diagnostic systems based on different modified codes with summation. Table 2 and Fig.4 contains results for the diagnostic system for the circuit «cm 162a». Here Lrs is area total area of diagnostic system based on current RS(m,k)-code; Ls - area of system based on Berger code. The last column is comparison of this two values; one can see that most RS(m,k)-codes has about 5-10% advantage by this parameter. Experiments with other benchmarks have shown similar results.

axis of abscissa is for the decimal equivalent of a, axis of ordinates corresponds to the decrease of diagnostic system technical implementation area comparing to the use of Berger code. Most varieties of code formation give both effects of decrease of undetectable errors and area on the chip.

TABLE II.

Areas of diagnostic systems for the circuit «cm162a»

a LRS (m,k ) LS (m,k ) LRS(m,k) % LS (m,k )

1 4320 89.404

2 5408 111.921

3 4576 94.702

4 5432 112.417

5 4416 91.391

6 4712 97.517

7 4080 84.437

8 5392 111.589

9 4592 95.033

10 4768 98.675

11 4480 92.715

12 4856 100.497

13 4376 90.563

14 4480 92.715

15 4544 94.04

16 4864 4832 100.662

17 4216 87.252

18 4880 100.993

19 4160 86.093

20 6624 137.086

21 4496 93.046

22 4328 89.57

23 4952 102.483

24 4432 91.722

25 4152 85.927

26 4408 91.225

27 4656 96.358

28 4248 87.914

29 4608 95.364

30 4040 83.609

31 4488 92.881

Fig. 4.Decrease of RS(m,k)-code based diagnostic system area comparing to the use of Berger code

It should be noted that (unlike for error detection characteristics) different ways of correction factor calculation lead to different areas of diagnostic system. It is illustrated on Fig. 4:

VI. Algorithm of code choicefor diagnostic systems

ORGANIZATION

Taking error detection features of RS(m,k)-codes in diagnostic systems into account authors have developed the algorithm of choice of correction factor calculation rules. It allows forming the diagnostic system with minimum hardware redundancy and maximum error detection (Fig. 5).

use of this algorithm allows simplification of diagnostic object topology analysis while choosing of modified code with summation for its check. Algorithm also considers minimization of probability of undetectable error appearance on its outputs. All distortions are detected after the transformation of diagnostic object topology into testable one. Use of RS(m,k)-code property to detect all monotonous errors with multiplicities d < 2^logi (m+1)1 it is possible to decrease the area of concurrent error detection system implementation comparing to known methods applied for transformation of circuits into

ones with monotonically independent outputs [18]. Considering properties of Rs(m,k)-code allows decreasing number of elements that should be reserved in the structure of diagnostic object. However, every certain case needs additional analysis of such transformation.

Fig. 5. Algorithm of RS(m,k)-code choice

VII. Conclusions

choice of correction factor calculation rules during RS(m,k)-code formation has the fundamental importance for real logical devices: different distributions of undetectable errors could be obtained even with the same number of data bits used for this operation. Wherein because of better properties of symmetric errors detection of RS(m,k)-codes comparing to Berger codes the total number of undetectable errors could be decreased in many cases. For some certain cases of logical

device topologies 100% error detection on its outputs could be gained by the use of RS(m,k)-codes.

Also use of RS(m,k)-codes in diagnostic system formation leads to decreasing of its area comparing to the use of Berger code, The algorithm developed by the authors allows synthesizing the diagnostic system for the given logical device considering minimum probability of appearance of undetectable errors on its outputs as well as 100% detection of any failures of inner gates of diagnostic object.

The presented results allow expanding the theory of logical devices concurrent error detection based on the use of antijamming codes with summation and to offer the designer a wider range of codes with simple formation rules.

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