CC BY
17
UDC 681.32
Siberian Journal of Science and Technology. 2017, Vol. 18, No. 2, P. 300-306
FAULT TOLERANT CMOS REALIZATION OF A MINORITY FUNCTION FOR AEROSPACE COMPUTER COMPLEXES
S. F. Tyurin
Perm National Research Polytechnic University 29, Komsomolsky Av., Perm, 614990, Russian Federation Е-mail: tyurinsergfeo@yandex.ru
In recent years, increased attention is paid to the reliability of the critical applications of digital equipment. Reliability means radiation resistance of digital equipment. For aerospace computer systems it is extremely urgent to develop radiation-resistant components. It is one way to ensure that the radiation resistance is the creation of a special architecture - RHBD (Radiation Hardened by Design). This approach includes triple redundancy (Triple Modular Redundancy, TMR). In implementing the triple redundancy to increase radiation resistance in the Xilinx FPGA Virtex used majoritarian elements based on a tristate buffer. One of the issuance of majority vote circuit for the loading sign to the pins of the FPGA is using a minority voting function. This feature ensures channel disconnection different from the other two. Only in this case, there is no conflict of signals at the outputs of buffers. Then it was realized majority function (voting by a majority). The FPGA logic elements LUT (Look Up Table) werer used for it. However, in this case FPGA logic resources were spent. CMOS implementation element vote on the minority was described. The paper proposes a fault tolerant CMOS implementation of minority voting function as separate elements in order to improve the performance of redundant circuits and do not use FPGA logic resources. Simulation of CMOS voting member in the minority is made in the circuit simulation of National Instruments Electronics Workbench Group system. Simulation confirms efficiency of the proposed element, and evaluation of the probability of failure-free operation shows its high efficiency. Winning there is a considerable range of probabilities as opposed to triple scheme that gets worse unreserved already at the probability of the order of 0.88.
Keywords: Triple Module Redundancy, Majority Vote Circuit, 3-State Buffer, Minority Function, Fault Tolerance
Сибирский журнал науки и технологий. 2017. Т. 18, № 2. С. 300-306
ОТКАЗОУСТОЙЧИВЫЙ ЭЛЕМЕНТ ГОЛОСОВАНИЯ ПО МЕНЬШИНСТВУ ДЛЯ АЭРОКОСМИЧЕСКИХ ВЫЧИСЛИТЕЛЬНЫХ КОМПЛЕКСОВ
С. Ф. Тюрин
Пермский национальный исследовательский политехнический университет Российская Федерация, 614990, г. Пермь, Комсомольский просп., 29 Е-mail: tyurinsergfeo@yandex.ru
Для аэрокосмических вычислительных комплексов необходима надёжная, радиационно стойкая элементная база, в том числе программируемые логические интегральные схемы (ПЛИС - FPGA). При реализации тройного резервирования (Triple Module Redundancy - TMR) с целью повышения радиационной стойкости в FPGA Virtex фирмы Xilinx используются мажоритарные элементы на основе буферов с тремя состояниями с использованием функции голосования по меньшинству, реализованной на логических элементах LUT (Look Up Table). Предлагается отказоустойчивая КМОП-реализация функции голосования по меньшинству в виде отдельных элементов для того, чтобы повысить быстродействие резервированной схемы и не использовать логические ресурсы ПЛИС. Выполняется моделирование КМОП-элемента голосования по меньшинству в системе схемотехнического моделирования National Instruments Electronics Workbench Group.
Ключевые слова: мажоритирование, мажоритар, функция голосования по меньшинству, буфер с тремя состояниями на выходе, отказоустойчивость.
Introduction. In recent years special attention is paid not only to digital equipment of critical application reliability, including aerospace digital computer systems [1; 2], but also to radiation-resistant element basis [3]. The Atmel [4; 5] company is working hard on the creation of radiation-resistant chips. One of ways to ensure radiation
resistance is creation of special architecture - RHBD (Radiation Hardened By Design). This approach includes triple redundancy (Triple Modular Redundancy, TMR) or majority function. Majority reservation is planted in the FPGA [6] (field-programmable gate array) programmable logic integrated circuits (PLIC) of the VirtexTM series of
Xilinx [7-9]. At the same time majority devices (Majority Vote Circuits) on the basis of 3-State buffers (BUFT) and vote devices on minority "Minoriti" (minority function, Minority Vote Circuits) are used. It is specified that vote devices on minority can be realized on the basis of so-called LUT (look up table) which represents ROM -multiplexers which inputs of data fix the given logic function [6]. Synthesis of the fault-tolerant device of vote on minority (Minority Vote Circuits) on CMOS transistors for the purpose of their use without involvement of the logical LUT resources and increase in probability of trouble-free (consistent) operation of triplicate digital system arouse interest.
Majority element based on 3-state buffers with minority function vote devices. In FPGA VirtexTM of Xilinx [7-9] realization of majority function on PLIC contact elements (programmable logical integrated circuit) using 3-state buffers and minority vote devices (Minority) is described (fig. 1, 2).
The table of "Minority" (Minority Voted) function validity of three channels A, B, C is suggested in fig. 3.
Thus the Minority Voted function has the following expression:
Z = ABC v ABC.
(1)
That is (1) equals one in case of difference of this channel (A, B or C) from two others transfering the output of the corresponding buffer to the third state to avoid conflict between signals with two other buffers having identical outputs. Let's construct CMOS implementation diagram (1).
CMOS implementation of minority voted function.
The suggested simplified diagram of CMOS Minority Voted function implementation (1) is represented in fig. 4.
Element modeling fig. 7 with three additional inverters in the system of circuitry modeling of National Instruments Electronics Workbench Group [10] confirms operability of the element in compliance with the table of validity fig. 3. Fig. 5 represents modeling of working (single) sets A, B, C.
Complexity of LUT [6] taking into account the setting in number of transistors (in connection with restrictions, stated in the Rules of topological design by Mead and Conway [11], n can't be more than 4) has the following appearance:
Ln = 2n
! + 2n+1 + 2n.
(2)
Even if for implementation of minority voting function LUT with n = 3 is used, we receive the following number of transistors:
L3 = 23 • 8 + 23+1 + 2 • 3 = 86.
(3)
The suggested implementation is complicated by the complexity of three inverters = 18 transistors, what is more than 4 times as less. However, in case of a minority voting element failure in one channel, the failure in the other channel will lead to a failure of all triplex system.
Fault tolerant CMOS realizations of voting minority function. To follow the Rules of topological design by Mead and Conway [11] on the number of sequentially switched on transistors (no more than 4) decomposition of the initial diagram is needed. One of the options is provided in fig. 6.
Fig. 1. Majority function implementation using "Minority" diagrams (Minority Voted) in sets 000,001, 010,011 Рис. 1. Реализация мажоритирования с использованием схем «минорити» (Minority Voted) на наборах 000,001, 010,011
Fig. 2. Majority function implementation using "Minority" diagrams (Minority Voted) in sets 100,101, 110,111 Рис. 2. Реализация мажоритирования с использованием схем «минорити» (Minority Voted) на наборах 100,101, 110,111
Fig. 3. The table of "Minority" (Minority Voted) function validity
Рис. 3. Таблица истинности функции «минорити» (Minority Voted)
Fig. 4. Simplified diagram of CMOS Minority Voted function implementation
Рис. 4. Упрощённая КМОП схема реализации функции «минорити» (Minority Voted)
а
□ Инд , /КМ™—;i t\ ш
b
Fig. 5. Modeling of CMOS implementation of the minority voted element: a - set 100; b - set 011 Рис. 5. Моделирование КМОП реализации элемента голосования по меньшинству: а - на наборе 100; б - на наборе 011
Fig. 6. Decomposition of the simplified CMOS diagram of the "Minority" function realization (Minority Voted) Рис. 6. Декомпозиция упрощённой КМОП схемы реализации функции «минорити» (Minority Voted)
Further transistors of the decomposed diagram in compliance with [12; 13] are reserved. Simulation of the element of fig. 6 with transistor reservation and with three additional inverters on some input patterns in the system of circuitry simulation of National Instruments Electronics Workbench Group is shown in fig. 7.
Assessment of probability of failure-free operation CMOS voting on minority function realization. For the Veybull model of refusals [14] applied for the purpose of in time radiation resistance assessment of the buffer without reservation we have probability of failure-free operation:
e-(18)A ■ ^ , (4)
where failure density of one transistor, a-coefficient, 1 <a< 2; t - an operating time in case of radiation.
For the offered redundant scheme of the voting minority element the probability of failure-free operation will be presented by expression
P(t)ftm = [e
-4-A-ta
+ 4- e-3 - a - ^ (1 - e-A - ^ )]22.
Let's estimate the tripling of the offered element. Under voting elements tripling taking into account one additional majority function:
P3 = (3 ■ e-2 ■ (18) ■ A ■ ta - 2 ■ e-3 ■ (18) ■ A ■ ta }e-(12) ■ A ■ ta. (6)
Under voting elements tripling taking into account three additional majority functions:
P33 = (3-e
-2 -(18)-A-ia
- 2- e-3 -(18) - a - Л )>
.(3- e-2 -(12) -a - ^ - 2- e-3 - (12) -a -'a).
(7)
(5)
Diagrams of failure free operation of minority voting
element probability change without reservation, e~(18)X4 , of probability of failure-free operation of the offered redundant diagram, of the tripled with one majority function P(0ftm , of the tripled diagram P3 with three majority
functions, P33, under failure rate X = 105 of 1/hour are represented in fig. 8.
PiafiHia e ... фи.™ ■ i_
4 тыняяттяиидтнш!
»Я> Л
»----— о к
DWHIJH iktol vj .uUfed-il^la^ »1 I- t rlv ■: S " 'Г. ИЗ
■—jocii
b
Fig. 7. Modeling of a failure-free element of vote on minority: a - in set 100; b - in set 011 Рис. 7. Моделирование отказоустойчивого элемента голосования по меньшинству: а - на наборе 100; б - на наборе 011
- (18) Xt
1
0.9 0. 0.7
а
" 0.6 P3W 0.5 Pftm(t) 0.4 P33(t) 0.3 0.2 0.1 0
0
b
Fig. 8. Diagrams of failure-free operation of the buffer without reservation probability change е-(6)л'г , failure-free operation of the redundant diagram - with transistors titration P(t)ftm , of the triple diagram with one majority function P3, of triple diagram with three majority functions P33 under failure density X = 10-5 of 1/hour: a - in the range from 1 to 0.6; b - in the range of probabilities from 1 to 0
Рис. 8. Графики изменения вероятности безотказной (бессбойной) работы буфера без резервирования e-(6)X'' , вероятности безотказной (бессбойной) работы резервированной схемы - с расчетверением транзисторов P(t)ftm , троированной схемы P3 с одним мажоритаром, троированной схемы с тремя
мажоритарами P33 при интенсивности отказов (сбоев) X = 10-5 1/час; а - в диапазоне от 1до 0,6;
б - в диапазоне вероятностей от1 до 0
Conclusion. In FPGA Virtex of Xilinx for the purpose of radiation resistance improvement tripling is used (Triple Module Redundancy - TMR). For the delivery of majority signal on FPMT connections "Minority" functions realized in three LUT are used, where the single signal is formed only in case of difference of this input from two others, providing at the buffers output which aren't in the third state, always 0 or 1 without "mixing". In the article failure-free CMOS realization of the voting minority element, allowing not to use FPMT logical resources and essentially simplify realization of a majority function on the basis of buffers, are described.
The executed modeling in the system of circuitry modeling of National Instruments Electronics Workbench Group has confirmed operability of the scheme offered.
The assessment failure-free operation probability confirms a considerable advantage over the triple diagram. This advantage is observed on the wide range of probability unlike that of the triple diagram which becomes worse than not redundant already at probability of about 0.88.
References
1. GOST 27.002-89. Nadezhnost' v tekhnike Osnov-nye ponyatiya. Terminy i opredeleniya. [Reliability Technology Concepts. Terms and Definitions]. Moscow, Izdatel'stvo standartov Publ., 1990. 42 p. (In Russ.)
2. Shubinskij I. B. Nadezhnye otkazoustojchivye in-formatsionnye sistemy. Metody sinteza [Robust fault-tolerant information systems. Methods of synthesis]. 2016, 544 p. (In Russ.).
3. GOST 18298-79. Stojkost' apparatury, komplektu-yushhikh ehlementov i materialov radiatsionnaya. Ter-miny i opredeleniya. [Resistance equipment, components and materials radiating elements. Terms and Definitions]. Available at: http://www.internet-law.ru/gosts/gost/4457/ (accessed 10.1.2017).
4. Donald C. Mayer, Ronald C. Lacoe. Designing Integrated Circuits to Withstand Space Radiation. Available at: http://www.aero.org/publications/crosslink/summer2003/ 06.html (accessed 11.1.2017).
5. Yudintsev V. Radiatsionno - stojkie integral'nye skhemy. Nadyozhnost' v kosmose i na zemle [Radiation -resistant integrated circuits.] Elektronika: Nauka, Tekh-nologiya, Biznes: zhurnal. Available at: http://www. electronics.ru/files/article_pdf/0/article_592_363.pdf (accessed 12.1.2017).
6. Strogonov A., Cybin S. Programmiruemaya kom-mutatsiya PLIS: vzglyad iznutri. [Programmable switching FPGA: a view from the inside.] Available at: http:// www.kit-e.ru/articles/plis/2010_11_56.php (accessed 11.1.2017).
7. Carl Carmichael. Triple Module Redundancy Design Techniques for Virtex FPGAs. Available at: https:// www.xilinx.com/support/documentation/application_notes/ xapp197.pdf (accessed 07.12.2016).
8. Xilinx Reduces Risk and Increases Efficiency for IEC61508 and ISO26262 Certified Safety Applications. WP461 (v1.0) April 9, 2015. Available at: http://www. xilinx.com/support/documentation/white_papers/wp461-functional-safety.pdf (accessed 20.12.2016).
0
100
200
300
200
400
600
800
а
9. QPro Virtex-II 1.5V Platform FPGAs. DS122 (v3.0) April 7, 2014. Available at: http://www.xilinx.com/ support/documentation/data_sheets/ds 122.pdf (accessed 20.12.2016).
10. Sayt razrabotchika National Instruments. [National Instruments Developer Site.] Available at: http://www.ni. com/multisim/ (accessed 22.12.2016).
11. Ulman Dzh. D. Vychislitelnye aspekty SBIS. [Computational Aspects of VLSI]. Moscow, Radio i svyaz Publ., 1990, 480 p. (In Russ.).
12. Nadezhnost i effektivnost v tekhnike: spravochnik [The reliability and efficacy in the art]. Ed. V. S. Avduev-skim. Vol. 2. Moscow, Mashinostroenie Publ., 1987, 280 p.
13. Tyurin S. F. [Functionally complete-tolerant FPGA elements for aerospace computer systems.]. Vestnik SibGAU. 2016, No. 2, P. 484-489 (In Russ.).
14. Tyurin S. F. [Modeling fault tolerant element for aerospace computer systems]. Vestnik SibGAU. 2016, No. 4, P. 1115-1119 (In Russ.).
Библиографические ссылки
1. ГОСТ 27.002-89. Надежность в технике. Основные понятия. Термины и определения. М. : Изд-во стандартов, 1990. 42 с.
2. Шубинский И. Б. Надежные отказоустойчивые информационные системы. Методы синтеза. 2016. 544 с.
3. ГОСТ 18298-79. Стойкость аппаратуры, комплектующих элементов и материалов радиационная. Термины и определения [Электронный ресурс]. URL: http://www.internet-law.ru/gosts/gost/4457/ (дата обращения: 30.12.2016).
4. Donald C. Mayer, Ronald C. Lacoe. Designing Integrated Circuits to Withstand Space Radiation [Электронный ресурс]. URL: http://www.aero.org/ publications/crosslink/summer2003/06.html (дата обращения: 10.01.2017).
5. Юдинцев В. Радиационно стойкие интегральные схемы. Надёжность в космосе и на земле // Электроника: наука, технология, бизнес : журнал. URL: http://www.electronics.ru/files/article_pdf/0/article_592_3 63.pdf (дата обращения: 11.01.2017).
6. Строганов А., Цыбин С. Программируемая коммутация ПЛИС: взгляд изнутри [Электронный ресурс]. URL: http://www.kit-e.ru/articles/plis/2010_11_ 56.php (дата обращения: 12.01.2017).
7. Carl Carmichael. Triple Module Redundancy Design Techniques for Virtex FPGAs [Электронный ресурс]. URL: https://www.xilinx.com/support/docu-mentation/application_notes/xapp197.pdf (дата обращения: 07.12.2016).
8. Xilinx Reduces Risk and Increases Efficiency for IEC61508 and ISO26262 Certified Safety Applications, [Электронный ресурс] WP461 (v1.0) April 9, 2015. URL: http://www.xilinx.com/support/documentation/white_papers/ wp461-functional-safety.pdf (дата обращения: 20.12.2016).
9. QPro Virtex-II 1.5V Platform FPGAs. DS122 (v3.0) [Электронный ресурс]. April 7, 2014. URL: http://www.xilinx.com/support/documentation/data_sheets/ ds122.pdf (дата обращения: 20.12.2016).
10. Сайт разработчика National Instruments [Электронный ресурс]. URL: // http://www.ni.com/multisim/ (дата обращения: 22.12.2016).
11. Ульман Дж. Д. Вычислительные аспекты СБИС / пер. с англ. А. В. Неймана ; под ред. П. П. Пархоменко. М. : Радио и связь, 1990. 480 с.
12. Надежность и эффективность в технике : справочник / ред. совет во главе с В. С. Авдуевским [и др.]. В 10 т. Т. 2. Математические методы в теории надежности и эффективности / под ред. Б. В. Гнеденко. М. : Машиностроение, 1987. 280 с.
13. Тюрин С. Ф. Функционально-полные толерантные элементы ПЛИС (FPGA) для аэрокосмических вычислительных комплексов // Вестник СибГАУ, 2016. № 2. С. 484-489.
14. Тюрин С. Ф. Моделирование отказоустойчиво -го элемента для аэрокосмических вычислительных комплексов // Вестник СибГАУ. 2016. № 4. С. 10151019.
© Tyurin S. F., 2017
