Научная статья на тему 'Prototype of a multi-user chaos-based system with correlator and support vector machine receivers'

Prototype of a multi-user chaos-based system with correlator and support vector machine receivers Текст научной статьи по специальности «Компьютерные и информационные науки»

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Ключевые слова
CHAOS-BASED COMMUNICATION / SVM AND CORRELATOR RECEIVERS / CDMA SYSTEMS / DSP DESING OF CDMA SYSTEM / HAOTIčNI KOMUNIKACIONI SISTEMI / SVM I KORELATORSKI PRIJEMNIK / CDMA SISTEMI / DSR RAZVOJ CDMA SISTEMA / ПРЯМОХАОТИЧЕСКИЕ СИСТЕМЫ СВЯЗИ / SVM КОРРЕЛЯ ЦИОННЫЙ ПРИЕМНИК / CDMA СИСТЕМЫ / DSP РАЗВИТИЕ CDMA СИСТЕМ

Аннотация научной статьи по компьютерным и информационным наукам, автор научной работы — Berber Stevan M.

Multiuser communication techniques are used in modern wireless networks like cellular and wireless sensor networks. The design of the physical layer for these networks was based on the application of binary spreading sequences and a correlation receiver. This paper presents a design of a multiuser code division transceiver using a new method of communication based on the application of chaotic spreading sequences that can increase security of the system, and on a new technique of detecting the received signal using a support vector machine and a traditional correlation receiver. The two receivers are theoretically analyzed, including the derivation of the probability of error expression in aclosed form for the fading channel, and then implemented in DSP technology on a 32-bit floating-point Tiger SHARC DSP platform. The comparison of two implemented systems showed that the support vector machine solution improves the robustness of the system, sacrificing the speed of processing. The achievable bit rate for the correlator receiver was up to two times higher than for the support vector machine receiver.

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Текст научной работы на тему «Prototype of a multi-user chaos-based system with correlator and support vector machine receivers»

ОРИГИНАЛНИ НАУЧНИ ЧЛАНЦИ ОРИГИНАЛЬНЫЕ НАУЧНЫЕ СТАТЬИ ORIGINAL SCIENTIFIC PAPERS

PROTOTYPE OF A MULTI-USER CHAOS-BASED SYSTEM WITH CORRELATOR AND SUPPORT VECTOR MACHINE RECEIVERS

Stevan M. Berber

The University of Auckland, ECE Department, New Zealand

e-mail: s.berber@auckland.ac.nz

ORCID iD: ©http://orcid.org/0000-0002-2432-3088

DOI: 10.5937/vojtehg64-8899

FIELD: Telecommunications, Wireless Communication Systems,

Multi-user Systems, Support Vector Machines ARTICLE TYPE: Original Scientific Paper ARTICLE LANGUAGE: English

Abstract:

Multiuser communication techniques are used in modern wireless networks like cellular and wireless sensor networks. The design of the physical layer for these networks was based on the application of binary spreading sequences and a correlation receiver. This paper presents a design of a multiuser code division transceiver using a new method of communication based on the application of chaotic spreading sequences that can increase security of the system, and on a new technique of detecting the received signal using a support vector machine and a traditional correlation receiver. The two receivers are theoretically analyzed, including the derivation of the probability of error expression in a closed form for the fading channel, and then implemented in DSP technology on a 32-bit floating-point TigerSHARC DSP platform. The comparison of two implemented systems showed that the support vector machine solution improves the robustness of the system, sacrificing the speed of processing. The achievable bit rate for the correlator receiver was up to two times higher than for the support vector machine receiver.

Key words: Chaos-based communication; SVM and correlator receivers; CDMA systems; DSP desing of CDMA system.

ACKNOWLEDGEMENT: The author is grateful to his summer research project student Shirin Ahmed for her efforts to work on the system prototyping.

Introduction

Due to high demands on mobile communications, wireless communication systems and networks are developing faster than ever. Main requirements are to increase capacity of communications links and reduce power consumption of devices, which led to the integration of different types of networks (Sunjevaric, et al, 2013) an their analysis targeted to increase their reliability (Jevtovic and Pavlovic, 2011). To reduce energy consumption, new techniques of communications are developed and new methods of signal detection are investigated. A support vector machine (SVM) is a machine learning technique which originates from statistical learning. This technique is immensely popular and highly recognized in the fields of data-mining for applications such as speech/music classifier (Lim, et al, 2012), text recognition and DNA micro-array analysis (Kecman, 2001), (Wang, 2005). Recently, there have been some preliminary investigations on applying the SVM as an alternative receiver for CDMA systems because of its ability to mitigate multi-user interference, increase security in signal transmission and adapt to the dynamic communication requirements related to the number of users and characteristics of spreading in the system (Kao and Berber, 2008), (Kao, et al, 2008 and 2010), (Hanzo, et al, 2001), (Yang, et al, 2005), (Kuh, et al, 1999), (Markagic, 2010). However, until now, there is no report on hardware implementation or practical realization of this receiver, which motivated the author to report the research results related to a prototype design of the system.

Recently, chaos-based communication systems have been under extensive development (Tam, et al, 2004), (Cimatti, et al, 2007), (Kaddoum, et al, 2012, 2013), (Berber, et al, 2013) and in particular multi-user CDMA systems that use classical and chaotic spread sequences (Chen, et al, 2001), (Xiao, et al, 2010), (Torrieri, et al, 2010), (Yue, et al, 2010), (Mazzini, et al, 1997), (Rovatti, et al, 1998), where the problem of robust system synchronization was extensively investigated (Kolumban, et al, 1997, 1998, 2000), (Setti, et al, 1999), (Rovatti, et al, 2001), (Berber, et al, 2006), (Jovic, et al, 2007), (Kaddoum, et al, 2009), (Vali, et al, 2010), (Sokolovic, et al, 2011). The majority of these papers analysed the systems with a flat fading channel. A detailed analysis of a CDMA system with an assumed wideband, frequency selective channel, was investigated by (Berber, 2014). Due to the limited orthogonality of the spreading sequences, the interuser interference increases with the increase of the number of users in CDMA systems. To overcome this problem of interference, the multiuser detectors are developed (Buehrer, et al, 2000), (Moshavi, 1996), (Poor and Verdu, 1997), (Verdu, 1998), and in particular detectors based on the application of the support vector machine (SVM) technique (Hanzo, et al, 2001), (Yang, et al, 2005), (Kuh, et al, 1999), (Chen and Hanzo, 2002), (Yang and Hu, 2006), (Zhao and Kuh, 2002).

Although the SVM technique was applied for signal detection, there are no publications presenting its implementation in DSP technology. This fact motivated the author to present his results related to the prototype design and testing of a chaos-based CDMA system. The system with a correlator receiver was also implemented in order to make comparison of this system with the system based on SVM. The bit error rate (BER) properties of both prototypes are compared with the corresponding properties of the theoretical and simulation model. The conducted theoretical and practical analysis showed the advantages of the SVM receiver and good matching of the theoretical and practical results, which presents the first contribution of this paper.

Since the probability of error expression in SVM CDMA systems has not been derived yet, the author made an additional contribution by deriving this expression in a closed form. It was further confirmed that the BER graphs comply with the corresponding graphs obtained by numerical integration (Kao, et al, 2010), which proves the validity of the obtained expression and makes an additional contribution of this paper.

Two systems are compared, one with the SVM and another one with a correlator receiver. It was shown that the correlator receiver can accommodate a higher bit rate than the SVM receiver. As far as complexity is concerned, the SVM requires longer processing time than the correlator receiver. The procedure of comparison and related findings are a valuable contribution of this paper.

This paper has seven sections. Section Two presents the basic characteristics of the chaotic sequences and the operations of a CDMA system. Theoretical modelling and derivative of BER for the correlator and the SVM receiver are presented in Section Three. In particular, a detail derivative for the BER expression of the SVM receiver is shown, which has not been derived yet. A prototype of the system is developed and presented in Section Four. The specific properties of the DSP design of the SVM system are presented in Section Five. The results of the prototype testing and its comparison with the theoretical and simulation models are presented in Section Six. The conclusions are presented in Section Seven.

Multi-user chaos based system operation with

the SVM receiver

Chaotic sequences and their properties

Chaotic sequences are non-binary sequences with a statistical structure that depends on their initial conditions. Due to their correlation properties, these chaotic sequences, generated using chaotic maps, can

be used in spread spectrum systems to spread message bits. The maps used to generate chaotic sequences are based on Chebyshev degree-L maps defined by this recursive equation ck+1 = cos(Lcos'lck). The discrete

random samples in the sequence c can take the values between -1 and +1. For L = 2, one obtains the logistic map that will be used in this work as the spreading sequence. The samples for this map are generated according to this recursive expression

ck+1 = 2ck-1, (i)

The density function for this map is

fc„(ck) = i 1 „ , (2)

c2

In order to compare chaotic systems with the classical binary system, the chaotic samples need to be generated with the unity average power. There are two methods to achieve this. The first method is to generate chaotic sequences with the average power equal to the power of a binary sequence. In this case, the sample of the chaotic sequence, in this paper denoted by ci, is defined as a linear function of ck, i.e., ct = 42ck, with a related density function (Berber and Feng, 2013) '

fc(ci) = —i 2 , for -42< c< 42, (3)

■ n2 - c

which is symmetric in respect to zero and has the mean square value of one, i.e.,

42 1

E{cf} = J c2 I 2 dci =1. (4)

-'& ct

The second method is to generate chaotic sequences using the recursive expression like (1) and then applying the simple rule: generate +1 if the generated sample is positive or generate -1 if the generated sample is zero or negative. In this case, using different initial conditions, the orthogonal binary sequences of ones and minus ones can be obtained, which has good correlation characteristics. As such, they can be used as spreading sequences in CDMA systems.

The degree of orthogonality between two sequences generated by the logistic map can be seen in Fig. 1 in which the cross and autocorrelation functions are shown.

1.2

Normalised Correlation Functions

0.8

0.6

0.4

0.2

Auto-correlation Cross-correlation

-0.2-1-1-1—

-500 -400 -300 -200

-100 0 Delay

100 200 300 400 500

Figure 1 - Autocorrelation and crosscorrelation functions (Berber, 2014) Рис. 1 - Автокорреляционная и взаимокорреляционная функции (Berber, 2014) Slika 1 - Funkcije korelacije i unakrsne korelacije (Berber, 2014)

As it can be seen, the cross-correlation of two chaotic sequences generated with different initial conditions is close to zero and the autocorrelation function of the same sequence has a peak when it is aligned in time by itself.

Communication system structure and operation

The basic structure of multi-user communication system, consisting of a transmitter (Tx), a channel and a receiver (Rx) is presented in Fig. 2. The system allows the transmission of N user signals simultaneously. The message bits of N users are spread by N orthogonal spreading chaotic sequences. All spread signals are added to form the transmitter signal st.

1

0

Tx

CHANNEL

Rx

У

r^H

y ^ sg 5k s

У

a n

d (x)1

SVM

y(1),a(1),q(1)

У

DC

d (x)g

SVM DC

>

d (x)"

SVM DC

y(1),a(1),q(1)

Synchronisation Sequence

y

У

Figure 2 - CDMA sistema structure Рис. 2 - Структура CDMA системы Slika 2 - Struktura CDMA sistema

The chips are transmitted through the channel characterized by additive white Gaussian Noise (AWGNC) and Rayleigh fading. This type of channel is adopted due to its possible complex behavior related to the propagation of signals between the transmitter and the receiver and random distribution of bit errors (Radonjic and Gacesa, 2011). The received signal, containing up to N user signals, is multiplied with the corresponding synchronous spreading sequence to take out the message of a particular user. For example, if only the g-th user signal is transmitted, the output of the multiplier for i-th chip value can be expressed as

x. = r.c. = yc. + n.c.

I 11 у I I I >

(5)

where cg = c is the locally generated spread sequence and r is the received chip. The SVM soft output for this user is d(x) = d(x)g that contains the transmitted message bits (Kao, et al, 2010). This soft value is applied to the input of the decision circuit (DC) which regenerates the estimate of the message bit yg at its output. The /h bit of the gth user is denoted by y=yg, which can have one of two values taken from the set {-1, +1}.

c

g

x

r

g

c

x

In the case of a correlator receiver, the system structure remains the same except that the SVM block is replaced by an adder that forms the correlator inside the users' receivers (Sandhu and Berber, 2009). The structure of the transmitter remains the same as in Fig. 2.

SVM detector operation

Unlike the correlator receiver, the SVM receiver has two stages of operation: the initial training or the learning stage, which needs to be performed once only, and the testing stage in which the estimation of the unknown noisy signal actually takes place. The operations of the two stages will be further discussed in the following sections.

1) Training Stage: During this stage, the goal of the SVM is to seek for a separation (hyper) plane which maximizes the margin between the two data-sets of (+1) and (-1) in a 2^-dimensional space (Kao, et al, 2010). The input training sequence x is a vector of length 2p, with the elements given as x-, = rc where c are chips in a periodic chip sequence of the length 2p (the notation for the user g is omitted in this section for simplicity). Each data sequence x is associated with a binary message y e {+1, -1} to indicate the desired output.

After the training is completed, the decision function of the linear SVM used here is expressed as (Kao, et al, 2010),

L

d(x) = X ya x +1) + b , (6)

l=1

where L is the number of training sequences, a (a > 0) is the Lagrangian dual variable which contributes to the slope of the separation plane and b is the intercept term of a decision hyperplane called bias (Kao, et al, 2010). The small sets of training sequences with non-zero ai are called support vectors (SVs). The training stage only needs to be completed once throughout the entire communication life-cycle, unless the underlying parameters such as the total number of users or the spreading factor have been changed significantly.

2) Testing Stage: When the training is completed, the SVM receiver can begin to estimate the transmitted symbol by making a hard decision in accordance with this decision rule (Kao, et al, 2010)

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y' = sign[d (x)], (7)

The receiver based on the SVM application solves a classification problem and does not need any knowledge of the spreading sequences of other users (Kao, et al, 2010).

Probability of error derivations for the SVM and the correlator receiver for a noisy channel

The theoretical BER of such SVM receiver calculated for the g-th user under AWGN has been already derived (Kao, et al, 2010) in this form

Pn =1 erfc

f 2P Nsv Nsv V

EE yaq,, + E y a+b

V i =1 5=1 5=1

2P f Nsv \

No E E yaA,,

i=1 V 5=1

(8)

where NSV is the number of support vectors and N0 is the noise power spectral density. In the case when a correlator receiver is used, the probability of error is derived in this form (Sandhu and Berber, 2009)

p = - erfc

Jrnc ^ **

w N -1 — +-+

P P

f E

V N0 y

-1/2

(9)

where the value of y determines the statistical characteristics of the spreading sequence, N is the number of users in the system, and is the spreading factor.

Probability of error derivations for the SVM and the correlator receiver for a fading channel

In the case of Rayleigh fading presence in the channel, the expression for the probability of error for the SVM receiver has not been published yet. In this case, the presence of fading will affect the received single user signal in such a way that the output of the receiver multiplier (5) will now have this form

xi = ayct + nici,

(10)

where a is the fading coefficient that affects all chips inside a bit interval. This expression refers to the signal of a single user. It is important to note that when deriving the probability of error for the SVM receiver, it is sufficient to consider a single user case because the influence of the multiuser interference is not contained at the output of the SVM detector. This

coefficient will affect the output of the SVM detector expressed by (6), which can be sufficiently accurately expressed as

( L A

d(x)=a Tyfli (xfx+1)+b

V 1=1

and further simplified to (Kao, et al, 2010)

(11)

d(x)=a

Nv

f 2ß

s=1

Tya Tvs+1

V i=i

^

+b

=a

( 2ß Nv Nv

Tx Tya+Tya+b

V i=1 s=1 s=1

(12)

Then, the probability of error can be expressed as a random function of the Rayleigh fading coefficient a in this form

Pn(a)=2efc

a

( 2ß Nv Nv Y

TT ya%+T y a+b

V i=1 s=1 s=1

2ß (Nw \

No T Tya%

i=1 V s=1

(13)

as derived in (Kao, et al, 2010). This expression will be further simplified in this paper and the probability of error in the fading case can be derived in a closed form in accordance with the following procedure. If the signal to noise ratio part in this expression is denoted by

( 2ß Nv Nsv V

TT y a As + T y a +b

X _ V i =1 s=1 s=1

2ß (Nsv V

No T T y^

i=1 V s=1

(14)

the expression for the probability of error can be simplified and expressed as a function of the fading coefficient a as

Pn(a) = 2 erfcJOTx=1 erfcslY,

(15)

where Y has a chi-squared probability distribution with two degrees of freedom because a2 has the same distribution, which can be expressed as

fY( y) = 4exp

y

( —y >

V y y

(16)

The probability of error for the Rayleigh fading channel can then be found as the mean value of function (15) and expressed in an integral form as

pf = E{pn (y)} =~ j er^Jy exP

2y 0

' -y'

y J

dy,

(17)

This integral can be solved using numerical integration. The results of this integration and simulation are presented and discussed in (Kao, et al, 2010). In order to avoid numerical integration, the closed form expression is found in this paper.

By using the property of the error complementary function and its derivatives, and then integrating relation (17) by parts, the expression for the probability of error can be derived in this closed form

pf =-"-

11 y

2 2\y+1

(18)

where the mean of Y is y = Y = E[a2}X = X, expressed by (14), because the mean power of fades is equal to one.

In the case when a correlator receiver is used, the probability of error is derived in the closed form (Sandhu and Berber, 2006)

p*(a) =1 efc

w N-1 — +-+

ß ß

v No J

-i

-1/2

(19)

where a is the fading coefficient, y determines the statistical characteristics of the spreading sequence, N is the number of users in the system, and is the spreading factor. The mean value of this function in respect to the Rayleigh random variable a, which is obtained in an integral form (Sandhu and Berber, 2006), gives the probability of error in the fading channel. However, this integral cannot be solved and numerical integration needs to be used. It is important to note that the probability of error increases enormously due to the fading presence in the channel. Thus, some techniques to mitigate fading should be used. If the block chip interleaving techniques are used, with the block dimensions x 2j8, the probability of error can be obtained in a closed form as (Berber and Vali, 2011)

-1 erfc 2

2+4N—n 2 +-

bn

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EL ^A

No J

-1/2

(20)

where the influence of fading expressed as b2=1/2 due to the unity power of the fading in the channel. It was proven that the substantial improvement can be achieved using the interleaving technique (Berber and Vali, 2011).

Design and implementation of the system with both SVM and correlator receivers

DSP platform for prototyping

For the design and the implementation of the chaos-based communication system, the ADSP-TS201S TigerSHARC processor from Analog Devices was used (Analog Devices Inc., 2014). Two processors are installed on an evaluation board named TS201S EZ-KIT Lite. The designed CDMA system was implemented on one of these processors. The processors support floating-point data formats, both single-precision 32-bit and extended precision 40-bit, and 8, 16, 32 and 64-bit fixed point data formats. The 32-bit floating-point data format was used in this design because it provides adequate precision for chaotic signal value generation. Although a fixed-point processor is generally faster in executing arithmetic operations, a floating-point processor is necessary when implementing a CDMA system, as a chaotic signal generator and a noise generator would require a wide dynamic range and high precision. Each processor on the EZ-KIT Lite platform has a clock speed of 600MHz, which is capable of executing 2400MIPS, 3600MFL0PS and 1200MMACS (Analog Devices Inc., 2014, Simic and Berber, 2006). This clock speed guarantees that the prototype of the CDMA system will be able to accommodate investigations of the multi-user signal transmission and the probability of error estimation.

The TigerSHARC processor is supported with development tools such as the VisualDSP++ environment, which allows programmers to develop and debug an application. The environment includes an assembler, a library builder, a linker, a loader, a cycle-accurate instruction level simulator, a C/C++ compiler and a C/C++ run time library that includes DSP and mathematical functions (Analog Devices Inc., 2014, Simic and Berber, 2006). The evaluation platform comes with a power supply and a USB connector cable that connects the user's PC with the evaluation board, which allows the user to program the processors and debug applications.

The developed prototype was designed using high-level C programming language. The developed software was fed into the processor as an assembly code using the Visual DSP++ environment. The developed code was loaded into the DSP platform and executed under the control of the external personal computer that was connected to the DSP board.

System prototype operation

The CDMA system based on the SVM receiver is designed and implemented in dSp technology. The block schematic of the systems is presented in Fig. 3. The structure of the prototype follows the structure of the theoretical and simulated model presented in Fig. 2. The prototype operates according to this brief description.

Figure 3 - Structure of the designed and implemented SVM CDMA system

Рис. 3 - Структура разработанной и внедренной системы SVM CDMA Slika 3 - Struktura dizajniranog i razvijenog CDMA sistema sa SVM prijemnikom

The independent test pseudorandom sequences, representing users' sequences, are generated for all users and transferred into polar non-return to zero form. The sequences are multiplied (spread) by chaotic orthogonal sequences generated for different initial conditions (ic). Spread signals of all users are added and then transferred through the channel characterized by the Additive Gaussian Noise, obtained for the designed noise generator.

At the receiver side, the blocks of Chaotic Generators, SVM detectors and decision circuits (DC) are implemented for the reception of the signals and generation of the estimates of the bit received.

The estimated bit samples are compared with the synchronous locally generated user sequence and the bit error rate (BER) values are calculated as the ratio of the number of errors counted and the number of bits transmitted. The test bit generators at the transmitter side are synchronized with the bit samples obtained at the output of the decision circuit.

When the receiver operates with the correlator instead of the SVM, the SVM detector is replaced by an accumulator. In this case the remaining structure of the transmitter and the BER estimator are the same as in Fig. 3.

Test Bit Generator

The Test Bit Generator is designed as a 16-bit Fibonacci linear feedback shift register (LFSR), which has taps at the position of bits 11, 13, 14 and 16. With an even number of taps, it is possible for the LFSR to cycle through all possible states (2n-1 states, where n is the length of the LFSR) except when all values are zero. In this design, the Bit at LFSR tap 10 was extracted as the output, and used as a user bit value. The following condition was set on generated bits: if the input bit value is zero, then the output bit value would be equal to -1. This established the function of a polar non-return to zero (PNRZ) encoder, as shown in Fig. 3. Every time the bit generator function was called, another bit value would be outputted. The bit generator function was used to generate message bits to feed into the transmitter function, and was also used to compare these bits in the BER calculator function with the received bit values. The bit generator would be reset (i.e. started from the beginning) when the BER calculation for a particular SNR value was complete. For this purpose, the synchronization between the estimated bit values at the receiver and the generated message bit values was established.

Chaotic sequence generators

Chaotic sequence generators were implemented in the discrete time domain where a particular chaotic signal value is derived from the chaotic signal value at the previous sampling time instant. For the chaotic generators implemented in DSP, the chaotic logistic map was used that is defined according to expression (1).

The values of a certain sequence are highly dependent on the initial condition (ic) which is independently generated for each user. According to the theory, by altering the initial condition slightly, the resultant sequences

can be a completely different and aperiodic. However, due to the inherent limited precision of DSPs, chaotic sequences tend to become periodic. Previous investigations of chaos-based communication systems have observed a range of initial conditions, and recorded corresponding discrete time periods, after which each sequence would start repeating itself (Vukadinovic and Berber, 2006). In the design presented in this paper, in order to avoid this periodicity, the following rule was applied: if the sequence reaches the time period value specified for that particular initial condition, the sequence is restarted with the same initial condition. The chaotic sequence generators are reset upon the completion of the BER calculation for a single SNR value.

Gaussian Noise samples

Gaussian noise samples are generated using the Box-Muller method which is based on generating two uniformly distributed samples U1 and U2 using the rand() function. These variables were then normalized by dividing by the RAND_MAX constant, which is defined in the library header file. U1 and U2 were then utilized by the Box Muller transform stated by (21) to produce the sample W which is a sample of a random variable having Gaussian distribution

W = 7 (-2ln(U1) cos(2nU2). (21)

The generated samples are having zero mean and unity variance. To generate samples for different SNR values, the Gaussian samples need to be multiplied by the value of the noise variance (Simic and Berber, 2006). The Gaussian value generator outputs the Gaussian sample. It is reset after each bit is decoded.

The signal to noise ratio (SNR) was changed by changing the noise power. For that purpose, a generator function was implemented that calculates the noise variance value for the desired SNR. The function takes the current SNR value and a reset value as inputs. It then calculates the energy of the current message bit, by squaring and summing the chaotic sequence values for the current message bit. Then it calculates the sigma value required for noise generation as

^ V 2 •1Qsnr'I0 , (22)

The sigma generator then outputs the sigma value calculated to the noise generator function. The sigma generator function is reset once the BER calculation for a single SNR value is complete.

The noise generator takes in the sigma value generated from the sigma generator for a particular message bit and a reset value as inputs. By multiplying the sigma value with the Gaussian sample generated, the resulting noise sample is then obtained at the output. In the main file, the noise generator is called on a per chip basis, and is added to the output of the transmitter function.

BER estimator

To evaluate the performance of the prototype system, the bit error rate (BER) was estimated by firstly setting an error threshold of 1000 errors, which gives a very high level of estimation accuracy obtained according to the method presented in (Berber, 1989).

The BER calculator function takes in the decision value from the SVM detector (or the correlator) and the bit generator output, and compares the two. If the values are not equal to one another, an implemented error counter increments by 1. Message bits are generated, transmitted, received and decoded until the error counter equals the error threshold. Once this happens, the total number of bits sent to achieve the threshold of 1000 errors is recorded. By dividing the error threshold by the number of bits sent, the BER for that particular SNR value, for defined both the number of users and the spreading factor, is calculated.

Once the theoretical BER and the BER of the system in DSP are calculated for a certain SNR value, the system repeats the same procedure for other SNR values if specified. The BER results are then stored in a text file in the debug folder.

Specific DSP design of the SVM detector and

the decision circuit

Training phase

To generate support vectors, training data for a defined number of users and the spreading factor had to be generated first. Training data is made up of a number of samples from the output of the correlator function. A block diagram of the program implemented on the DSP to generate the training data is shown in Fig. 4.

Bit Generator

SVM Bit Transmitter

Generator

Chaotic Sequence Generator

Correlator Receiver

csv file

Receiver Chaotic Sequence

Figure 4 - Functional block diagram of the system for the training phase Рис. 4 - Функциональная блок-схема системы для фазы подготовки Slika 4 - Principski blok dijagram sistema u fazi treninga

The number of samples required for training depends on the SNR value. For this design, training data was subjected to no noise. Hence, 200 sample message bits sufficed: a hundred message bits of value +1 and a hundred message bits of value -1. The spreading factor was set to 20 as an appropriate number for this purpose (Kao, et al, 2008). The message bits were generated using a function called the SVM Bit Generator, as shown in Fig. 4, which generated 200 message bits that were assigned to the desired user only, while the interferers' user bits were generated from the Bit Generator function. Message bits for the desired user and message bits for interferers are spread with a chaotic sequence (Kao, et al, 2008), which was taken as an input from the Chaotic Sequence Generator.

The output of the transmitter function was taken as an input by the correlator function. The Receiver Chaotic Sequence block generates the desired user's chaotic sequence to be correlated with the incoming received sequence. The results of this correlation are stored in a csv file. Hence, after all 200 sample message bits are transmitted, the csv file would contain the each message bit value and the corresponding correlation values, which represents the training data that can be used to generate support vectors.

To generate support vectors using the training data stored in the csv file, training was carried out by the iterative single data algorithm (Kao, et al, 2008). The result of this training is a data file that contained the parameters such as weights, centers and bias values of the support vectors. To extract these parameters, a program created in Matlab was fed with this data file, and the parameters were stored in separate text files, which were then read by the program in DSP.

SVM receiver design

The implemented program first reads the weights, centers, bias values and the number of support vectors from the text files, which have been generated from the training data for a particular number of users. For additional users, or a change in the spreading factor, the training phase would have to be repeated to get a different set of support vectors, because the number of support vectors depends on the spreading factor and the number of users in the system. For example, for 2 users, and a spreading factor of 20, 3 support vectors were generated. However, if the number of users increases to 8, 20 support vectors would be generated.

The purpose of the SVM function is to compute the decision function defined by (6). At this point, it is necessary to make these observations. In equation (6), L is the number of support vectors generated for a particular number of users and the spreading factor, the variable yai is the weight that is generated for each support vector. The variable xi represents the centers generated for each support vector. The number of centers for each support vector is of the spreading factor length, and each center is multiplied with each corresponding output value of the correlator denoted by x. The value b is the bias value. The SVM function computes the decision function for all the support vectors generated, and outputs a value which is fed into the decision circuit. This decision function is used to calculate the probability of error in (13) and (18), where the appropriate notation is used.

Results of the investigation and the comparison of the prototype with the theoretical

and the simulation model

Probability of error analysis in the noisy channel

The bit error rates, for the system with the SVM and the correlator receiver implemented in DSP technology, are calculated after the support vector parameters were loaded onto the DSP. The BER for the CDMA system performance with the SVM incorporated in the receiver was measured for the SNR value range of -1dB to 8dB and the results are presented in Fig. 5 for a single user system. This BER curve is plotted against the simulation and theoretical curves investigated previously in (Kao, et al, 2008, 2010). The theoretical curves for the system with a correlator receiver, and with the SVM incorporated into the receiver are shown, along with the BER results from the Matlab simulations and the DSP prototype.

The SVM receiver has better BER performances than the correlator receiver. The SVM BER curves obtained by the theory are overlapping with the curve obtained by the simulation. The BER curve obtained by DSP SVM receiver follows quite closely the simulation curve. The improvement in the BER of the SVM in respect to the correlator receiver increases when the SNR increases.

This improvement in the BER is expected to be higher when the number of users increases due to the ability of the SVM receiver to eliminate the interuser interference. For this reason, the communication system was investigated for 4 active users in the system and the related BER curves are presented in Fig. 6

10

10-2

BER 10-3

10-4

10-5 10-6

Number of users = 1, SF = 20 Train SNR = INF, SV = 3

-Correlator - theory

SVM - simulation

SVM - theory SVM - DSP design

-2

0

2 4

Eb/N0

6

8

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Figure 5 - BER curves, theoretical, simulated and DSP results for the system with the SVM

for 1 user

Рис. 5 - Кривые вероятности битовой ошибки (BER), полученные при теоретическом моделировании и DSP результатах для системы SVMc одним

пользователем

Slika 5- Grafovi verovatnoce greske bita (BER) dobijeni prema teorijskim, simulacionim i DSP rezultatima za sistem sa SVM i za slucaj jednog ucesnika

Firstly, it can be observed that the DSP BER curves match perfectly the simulation and theoretical curves obtained by relation (8). Secondly, the figure shows that the improvement in the BER of the SVM in respect to the correlator receiver increases substantially when the SNR increases. This matches perfectly well the theory which states that the SVM receiver eliminates the influence of the inter user interference. Namely, when the SNR is small, less than 2 dB in this case, the noise dominates and the BER is close to the correlator receiver.

10-1

10"

BER

10"

10

10"

10"

-4

Number of users = 4, SF = 20 Train SNR = INF, SV = 7

-Correlator - theory

SVM - simulation

SVM - theory SVM - DSP design

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Figure 6 - Theoretical, simulated and SVM DSP BER curves for the CDMA system for 4 users. A theoretical BER curve for the correlator receiver is added for comparison. Рис. 6 - Кривые вероятности битовой ошибки (BER), полученные при теоретическом моделировании и DSP результатах для ^ct^CdMA и SVMc четырьмя пользователями. Теоретическая BER кривая корреляционного приемника

приведена для сравнения Slika 6 - Grafovi verovatnoce greske bita (BER) dobijeni prema teorijskim, simulacionim i DSP rezultatima, za CDMA sistem sa sVm i za slucaj cetiri ucesnika.

Teorijska BER kriva za korelatorski prijemnik je dodata radi uporedenja

However, when the SNR increases, then the BER improves in the SVM receiver due to the elimination of the inter-user interference. The curves for the correlator receiver have significantly higher BER values in this case due to the presence of interuser interference.

Probability of error analysis in the fading channel

In this paper, the closed form theoretical expression for the probability of error is derived in Section Three and expressed by (18). The BER graphs obtained by both that expression and the simulation are presented in Fig. 7 for two cases, when the number of users in the system is either 10 or 30.

10

m

10

-3

1-analytical /[-simulation

-о V i\ О SV1\

-

10 users ^30 users

-

10 15

Eb/N0 (dB)

20

25

Figure 7 - BER curves obtained by both the theoretical expression in the closed form

and the simulation

Рис. 7 - Кривые вероятности битовой ошибки (BER), полученные при теоретическом моделировании в закрытом канале Slika 7- Grafovi verovatnoce greske bita (BER) dobijeni prema teorijskom izrazu u zatvorenom obliku i na osnovu simulacije

In both cases the theoretical curves are matching very well the simulation curves. These curves are matching also the curves obtained by numerical integration as presented in reference (Kao, et al, 2010). The difference between a 10-user and a 30-user system are close to 1 dB. This result is expected because the CDMA system with the SVM detector eliminates the inter-user interference very well.

Speed estimation

The main purpose of this investigation related to the speed estimation was to compare the difference between the bit rates of the CDMA system implemented using the correlator receiver and the system with the SVM receiver. For this purpose 104 message bits were transmitted and received in both systems. The time taken for processing was measured for the spreading factor of 20. Fig. 8 shows the bit rates as a function of the number of users for both systems. The clock cycles, which are necessary to execute the relevant code, were measured and converted to the bit rate according to this expression

Rb =

в • fc

C • N

(23)

where Rb is the bit rate, B is the number of bits sent, fc is the clock frequency, C are clock cycles and N is the number of users.

Rb

4.5 4

3.5 3

2.5 2

1.5 1

0.5

0

Figure 8 -Рис. 8 -Slika 8 -

Correlator Receiver SVM Receiver -

10

12 14

16

N

- Speed estimation for the system with the correlator receiver and the SVM

receiver for a different number of users Средняя скорость для системы корреляционного и SVM приемника

с разным кол-вом пользователей Prosecna brzine za sistem sa korelatorskim i SVM prijemnicima za razliciti broj ucesnika

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It was found that the bit rate was 1.5 to 2 times higher for the system with the correlator receiver than for the system with the SVM. Namely, in the SVM receiver, more computation is involved, and hence more processing time is required.

Therefore, from the BER performance results, it can be concluded that, by incorporating the SVM into the receiver, the performance of the system increases significantly in respect to the correlator receiver. However, the execution speed on DSP reduces considerably.

Conclusion

The design of a prototype CDMA system with a SVM receiver is implemented on the 32-bit floating point ADSP-TS201S TigerSHARC processor. The prototype was developed by creating functions in C language, and was programmed on the processor situated on a TS201S EZ-KIT Lite evaluation platform. It was confirmed that the robust prototype can be designed on this platform.

The training phase was performed to generate the support vectors via programs in Matlab software. The theoretical expression for the probability of error was derived in the closed form in the case when fading is present in the channel. The bit error rate (BER) measurement in the prototype system confirms that the SVM receiver performs better than the corresponding correlator receiver. The BER performance of the prototype matches theoretical and simulation results for varying both the spreading factor and the number of users.

The expected problem of the periodicity of spreading sequences due to the finite resolution of the dSp operations was solved by the reinitializing the chaotic sequence generators. Because the theoretical and simulation results matched very well the DSP results, it is obvious that the DSP resolution does not influence the performance of the system.

The results of the speed estimation analysis show that the CDMA system with the correlator receiver has a higher bit rate than the CDMA system with the SVM receiver, due to larger computation with support vectors. The speed in signal processing of the presented prototype is not sufficient to accommodate increasing demands in bit rates. However, a valuable experience is gained in system design and a possible speed increase through both the optimization of the existing processing algorithms and the application of the new DSP technologies. One of the streams of future research could be to make a prototype of the system in the case when fading is present in the channel and the methods of fading mitigations are applied, like chip interleaving.

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ПРОТОТИП МНОГОПОЛЬЗОВАТЕЛЬСКОЙ СИСТЕМЫ, ОСНОВАННОЙ НА КОРЕЛЛЯЦИОННЫХ ПРИЕМНИКАХ ИЛИ ОПОРНЫХ ВЕКТОРАХ

Стеван M. Бербер

The University of Auckland, ECE Department, Новая Зеландия

ОБЛАСТЬ: телекоммуникации, беспроводная система коммуникации ВИД СТАТЬИ: оригинальная научная статья ЯЗЫК СТАТЬИ: английский

Резюме:

Технология многопользовательской системы коммуникации с кодовым распределением каналов (CDMA) используется в современных беспроводных сетях, таких как сотовые, радиотелефонные сети и беспроводные сенсорные сети.

Развитие передачи сигнала на физическом уровне в сети, основано на применении двоичных последовательностей в расширении зоны сигнала и применении корреляционных приемников.

В данной работе описана разработка приемопередатчика CDMA сигналов, при применении новых коммуникационных методов, основанных на хаотической последовательности в расширении зоны сигналов, обеспечивая тем самым защиту передачи сообщений в системе, применяя методы новых технологиях обнаружения сигналов при использовании машины опорных векторов в приемнике (SVM - приемник) и традиционного применения корреляционных приемников.

Проведен теоретический анализ обеих моделей приемников, включая вывод вычисления вероятности битовых ошибок в каналах с замираниями (федингом) сигналов, затем произведено внедрение в цифровые технологии (DSP) на 32-битовую процессорную платформу TigerSHARC.

Сопоставление этих систем показало, что решение применения машины опорных векторов (SVM - приемник) улучшает ро-бастность системы за счет снижения скорости потока.

В то время как осуществленный поток битов корреляционного приемника в два раза превышает поток битов приемника машины опорных векторов.

Ключевые слова: прямохаотические системы связи; SVM корреляционный приемник; CDMA системы; DSP развитие CDMA систем.

PROTOTIP VISEUCESNICKOG SISTEMA BAZIRANOG NA PRIJEMNICIMA SA KORELATORIMA ILI MASINOM PODRZAVAJUCIH VEKTORA

Stevan M. Berber

The University of Auckland, ECE Department, Novi Zeland

OBLAST: telekomunikacije, bezicni komunikacioni sistemi VRSTA CLANKA: originalni naucni clanak JEZIK CLANKA: engleski

Sazetak:

Tehnike viseucesnickih komunikacija sa kodnom raspodelom kana-la (CDMA) koriste se u modernim bezicnim mrezama kao sto su mobilne radio-telefonske mreze i bezicne senzorske mreze.

Razvoj prenosa signala na fizickom nivou u ovim mrezama za-snovan je na primeni binarnih sekvenci za prosirenje signala i primeni korelatorskih prijemnika. U ovom radu prikazan je razvoj primopredaj-nika za prenos CDMA signala koriscenjem nove komunikacione metode zasnovane na primeni haoticnih sekvenci za prosirenje signala, cime se moze povecati zastita u prenosu poruka u sistemu, i razvojem nove tehnike detekcije signala koriscenjem masina sa podrzavajucim vektorima u prijemniku (SVM prijemnik) i tradicinalno koriscenog kore-latorskog prijemnika. Oba razvijena prijemnika su teorijski analizirana, ukljucujuci izvode izraza za verovatnocu greske bita u zatvorenom obli-ku u slucaju kanala sa fedingom, a zatim je izvrsena njihova implemen-tacija u digitalnoj tehnologiji (DSP) na 32-bitnoj procesorskoj platformi TigerSHARC. Poredenje ova dva sistema pokazalo je da resenje sa masinom sa podrzavajucim vektorima (SVM prijemnik) poboljsava ro-bustnost sistema po cenu smanjenja brzine procesiranja. Medutim, ostvarljivi protok bita kod prijemnika sa korelatorom bio je dva puta ve-ci nego kod prijemnika koji koristi masinu sa podrzavajucim vektorima.

Uvod

Ovih godina porastao je interes da se optimizuju prijemnici u bezicnim komunikacijama radi potrebe za prenosom velike kolicine podataka i ostvarenja energetske efikasnosti, posebno u podrucju mobilnih komuni-kacionih sistema i bezicnih senzorskih mreza. Radi ovih zahteva oceku-je se novi razvoj u oblasti dizajna prijemnika kako bi se smanjila njihova slozenost i povecala energetska efikasnost.

Da bi se ostvario prenos veseucesnickih signala moze da se koristi tehnika prenosa sa kodnom raspodelom kanala (CDMA), koja omoguca-va istovremenu komunikaciju vise ucesnika u istom komunikacionom si-stemu tako da se svakom ucesniku dodeli jedinstvena kodna sekvenca kojom se prosiruje signal poruke u predajniku i koja se koristi u prijemni-ku kako bi se otkrio sadrzaj poslate poruke. Razvoj prijemnika ovih sistema tradicionalno se zasnivao na primeni uskladenih filtera i korelatora.

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U poslednje vreme doslo je do preliminarnih istrazivanja o mogu-coj primeni masina sa podrzavajucim vektorima (SVM), kao jednoj od alternativa za dizajn prijemnika za CDMA sisteme, zbog njihove spo-sobnosti da prevladaju meúu-ucesnicku interferenciju i da se prilagode na dinamicne komunikacione zahteve u odnosu na broj ucesnika i ka-rakteristike sekvenci za prosirenja signala. Meúutim, do sada nema ra-dova koji govore o hardverskoj implemantaciji ili prakticnoj primeni ova-kvih prijemnika, sto je bila dodatna motivacija autoru da objavi rezulta-te istrazivanja o dizajnu prototipa ovog sistema.

Kommunikacioni sistemi koji koriste haoticne sekvence bili su pred-met znacajnih istrazivanja, a posebno CDMA sistemi koji koriste klasicne i haoticne sekvence za prosirenje signala, pri cemu je problem robustne sinhronizacije nasiroko ispitivan. Vecina radova analiziralo je ove sisteme za slucaj prisutnosti ravnog fedinga u kanalu prenosa. Detaljna analiza CDMA sistema sa sirokopojasnim, frekvencijski selektivnim kanalima ura-úena je tek u poslednje vreme. Zbog ogranicene ortogonalnosti sekvenci za prosirenje signala dolazi do povecanja interucesnicke interferencije sa povecanjem broja ucesnika u CDMA sistemu. Da bi se prevladao ovaj problem razvijeni su multiucesnicki detektori, a posebno detektori koji su zasnovani na primeni masina sa podrzavajucim vektorima (SVM).

Uprkos tome sto su SVM tehnike primenjene za detekciju signala, nije bilo objavljenih radova koje prikazuju razvoj ovih ureúaja u digitalnoj (DSP) tehnologiji. Ova cinjenica motivisala je autora da prikaze svoje rezultate u vezi s dizajnom i testiranjem prototipa CDMA sistema uporedo sa rezultati-ma analize sistema koji koristi korelatorski prijemnik radi uporeúenja ovih sistema. Karakteristike oba prototipa sa aspekta stepena greske bita (eng. BER) uporeúene su i prikazane odnosne karakteristike teorijskog i simulaci-onog modela. Provedena teorijska i simulaciona analiza pokazale su pred-nosti tehnike SVM-a i dobro slaganje teorijskih i prakticnih rezultata.

Posto izraz za verovatnocu greske bita nije jos bio izveden u zatvo-renom obliku za SVM CDMA sistem, autor je izveo ovaj izraz i prezentirao grafove za stepen greske bita (BER). Pokazano je da se ovako dobijeni grafovi za BER slazu sa odgovarajucim grafovima koji su dobijeni nume-rickom integracijom, sto dokazuje validnost izvedene teorijske formule.

U radu su uporeúena dva sistema - sistem sa SVM prijemnikom i si-stem sa korelatorskim prijemnikom, i pokazano je da korelatorski prijemnik ostvaruje veci digitalni protok. Sto se tice kompleksnosti dizajna, dokaza-no je da SVM prijemnik zahteva duze vreme za procesiranje signala. Pri-kazana procedura poreúenja i dobijeni grafovi su rezultati vredni paznje.

Viseucesnicki sistem zasnovan na koriscenju haoticnih sekvenci i SVM prijemnika

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U ovom odeljku prikazana je blok-sema SVM prijemnika i objasnjen princip rada svih blokova. Objasnjen je princip generisanja haoticnih se-kvenci i prikazana funkcija korelacije i unakrsne korelacije u grafickoj for-mi. Posebno je objasnjen princip rada SVM detektora. Izvedeni su izrazi za verovatnocu greske bita u zatvorenom obliku za SVM prijemnik u slu-caju kada je u kanalu prisutan sum i ravni feding.

Razvoj i implementacija sistema sa SVM i korelatorskim prijemnikom

Definisan je uskopojasni kanal sa ravnim fedingom.Takode, izvrse-na je matematicka analiza sistema, tako sto su prikazani signali na kljuc-nim tackama prijemnika i predajnika. Prikazan je izraz za signal na izla-zu korelatora sekvenci, a zatim izveden izraz za verovatnocu greske bita u zatvorenom obliku i analiziran sa aspekta uticaja broja ucesnika u si-stemu i sa aspekta vrednosti faktora prosirenja signala.

Prikazane su karakteristike DSP platforme na kojoj je uraúen proto-tip sistema, tako sto su objasnjene osnovne karakteristike DSP ploce proizvodaca Analog Devices. Prikazana je blok-sema razvijenog sistema i objasnjen princip njenog rada. Naglaseno je da struktura prototipa veo-ma dobro prati strukturu teorijskog i simulacionog modela o kojima je bi-lo reci na pocetku rada. Objasnjena je procedura generisanja haoticnih sekvenci sa posebnim osvrtom na problem generisanja aperiodicnih sekvenci. Pri razvoju sistema koriscena je Boks-Milerova metoda za gene-risanje Gausovog suma, koja se zasniva na generisanju dva niza neza-visnih slucajnih uzoraka koji imaju uniformnu funkciju distribucije vero-vatnoca. Poslednja sekcija posvecena je problemu tacne estimacije vrednosti BER -a za definisanu vrednost odnosa signal-sum.

Razvoj SVM detektora i sklopa odluke

U ovom delu objasnjeno je kako se generisu vektori podrske i podaci treninga za definisani broj ucesnika i odredeni faktor prosirenja signala. Podaci treninga prikazani su u formi izvesnog broja uzoraka kao rezultat obrade u korelatoru. Broj uzoraka zavisi od vrednosti odnosa signal-sum. Da bi se generisali vektori podrske na osnovu ovih podataka, koji su me-morisani u posebnom fajlu, nastavljen je trening uz koriscenje iterativnog algoritma. Rezultat ovog treninga je fajl podataka koji sadrzi parametre kao sto je tezinski faktor, centralna vrednost i pristranost vektora podrske.

Rezultati ispitivanja i uporedenja prototipa sa teorijskim i simulacionim modelom

U ovom odeljku prikazani su procedura i rezultati testiranja prototipa, ukljucujuci: analizu verovatnoce greske bita u kanalu sa sumom sa odnosnim grafovima za slucajeve kada su jedan ili cetiri ucesnika prisu-tani u sistemu, zatim verovatnocu greske bita kada je ravni feding prisu-tan u kanalu sa odnosnim grafovima za 10 i 30 ucesnika, i na kraju, krat-ku analizu stepena greske bita koji se moze ostvariti koriscenjem korela-torskog prijemnika u odnosu na SVM prijemnik, cime je pokazano da SVM prijemnik ostvaruje manji bitski protok nego korelatorski prijemnik.

Zakljucak

Uraden je razvoj prototipa CDMA sistema, koji koristi haoticne sekven-ce i SVM prijemnik, pri cemu je koriscena razvojna platforma 32-bitnog ADSP-TS201S TigerSHARC procesora. Ovaj prototip razvijen je tako sto su funkcije sistema implementirane u C jeziku na procesoru koji je smesten na TS201S EZ-KIT Lite razvojnoj platformi. Potvrdeno je da se na ovoj platfor-mi moze implementirati prototip koji sledi simulacioni i teorijski model.

Koricena je faza treninga da bi se generisali podrzavajuci vektori koristeci Matlab program. /zveden je izraz za verovatnocu greske bita u zatvorenom obliku za slucaj kada je ravni feding prisutan u kanalu pre-nosa signala. Merenjem na prototipu sistema pokazano je da je stepen greske bita bolji kod prijemnika sa SVM nego kod korelatorskog prijem-nika. Vrednosti stepena greske bita prototipa, za razlicite faktore prosire-nja i promenljivi broj ucesnika, slazu se sa odgovarajucim vrednostima dobijenim na simulacionom i teorijskom modelu.

Ocekivani problem periodicnosti haoticnih sekvenci prosirenja signala zbog konacne rezolucije u DSP dizajnu resen je tako sto se vrsila ponovljena inicijalizacija generatora sekvenci. Posto su se teorijski i eks-perimentalni rezultati dobro poklopili ocigledno je da DSP rezolucija nema uticaja na performanse sistema.

Rezultati ocene brzine obrade signala pokazali su da CDMA sistem sa korelatorskim prijemnikom ima veci bitski protok nego SVM prijemnik, sto je rezultat duzeg procesiranja signala pri racunanju podrzavajucih vek-tora. Ova brzina procesiranja ostvarena na prototipu ne moze da zadovolji povecane potrebe za bitskim protokom u realnim sistemima. Medutim, ve-oma korisna iskustva stecena su prilikom razvoja ovog pototipa i sagleda-ne mogucnosti kako da se procesiranje ubrza kroz optimizaciju algoritama i primenu novih digitalnih tehnologija. Moguci pravac buducih istrazivanja mogao bi da bude usmeren ka izradi prototipa sistema koji koristi metode eliminacije fedinga, kao sto je metoda ucesljavanja cipova. Kljucne reci: haoticni komunikacioni sistemi, SVM i korelatorski prijemnik, CDMA sistemi, DSR razvoj CDMA sistema.

Datum prijema clanka / Дата получения работы / Paper received on: 26. 08. 2015. Datum dostavljanja ispravki rukopisa / Дата получения исправленной версии работы / Manuscript corrections submitted on: 24. 10. 2015.

Datum konacnog prihvatanja clanka za objavljivanje / Дата окончательного согласования работы / Paper accepted for publishing on: 26. 10. 2015.

© 2016 Autor. Objavio Vojnotehnicki glasnik / Military Technical Courier (www.vtg.mod.gov.rs, втг.мо.упр.срб). Ovo je clanak otvorenog pristupa i distribuira se u skladu sa Creative Commons licencom (http://creativecommons.org/licenses/by/3.0/rs/).

© 2016 Автор. Опубликовано в "Военно-технический вестник / Vojnotehnicki glasnik / Military Technical Courier" (www.vtg.mod.gov.rs, втг.мо.упр.срб). Данная статья в открытом доступе и распространяется в соответствии с лицензией "Creative Commons" (http://creativecommons.org/licenses/by/3.0/rs/).

© 2016 The Author. Published by Vojnotehnicki glasnik / Military Technical Courier (www.vtg.mod.gov.rs, втг.мо.упр.срб). This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution license (http://creativecommons.org/licenses/by/3.0/rs/).

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